--- title: "n-channel enhancement MOSFET" subject: "Fundamental of Electrical and Electronics Engineering" chapter: 5 key: "semester_1/fundamental_of_electrical_and_electronics_engineering:enhancement-mosfet-construction" source: https://www.bctengineer.com/q/semester_1/fundamental_of_electrical_and_electronics_engineering/enhancement-mosfet-construction site: BCT Engineering --- # n-channel enhancement MOSFET Fundamental of Electrical and Electronics Engineering · Chapter 5: Transistor - Asked in: 2081 Baishakh (new course), 4 marks - Video: [MOSFET - Enhancement Type MOSFET Explained (Construction, Working and Characteristics Explained)](https://www.youtube.com/watch?v=l9LBIy9Ioxo) — ALL ABOUT ELECTRONICS - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_1/fundamental_of_electrical_and_electronics_engineering/enhancement-mosfet-construction - Whole chapter: https://www.bctengineer.com/md/semester_1/fundamental_of_electrical_and_electronics_engineering/chapter-5 ## Question Describe the construction and working principle of n-channel enhancement type MOSFET. ## Short answer An n‑channel E‑MOSFET has a p‑substrate, n+ source/drain, and insulated gate with no built‑in channel. At V_GS = 0 it is off. For V_GS ≥ V_T, an inversion n‑channel forms; I_D increases with V_GS. In saturation, I_D = k(V_GS − V_T)^2. ## Answer An **n-channel enhancement MOSFET (E-MOSFET)** is a field-effect transistor in which no channel exists at V_GS = 0; a channel is created ("enhanced") only when a positive gate voltage above the threshold V_T is applied. #### Construction ```text S G D | __|__ | ___|___ |metal| ___|___ | n+ ||=SiO2=|| n+ | |_______| ~~~~ |_______| | induced n-channel | | p-type substrate | |__________________________| | SS (body) ``` - A lightly doped **p-type substrate** forms the body. - Two heavily doped **n+ regions** are diffused into it to form the **source** and **drain**. - A thin layer of **silicon dioxide (SiO₂)** insulates the substrate surface; a metal (or polysilicon) **gate** is placed on top. The gate is insulated, so gate current is practically zero (very high input resistance, about 10¹⁰–10¹⁵ Ω). - There is **no built-in channel** between source and drain. The substrate is usually connected to the source. #### Working principle 1. **V_GS = 0:** source and drain are separated by p-type material, forming two back-to-back pn junctions. Only a tiny leakage current flows, so I_D ≈ 0 (device OFF). 2. **0 < V_GS < V_T:** the positive gate repels holes from the region under the oxide, leaving a depletion region of negative ions. Still no conduction. 3. **V_GS ≥ V_T (threshold, typically 1–3 V):** enough electrons (minority carriers of the p-substrate) are attracted under the gate to form a thin **n-type inversion layer**. This channel connects source and drain, and with V_DS > 0, electrons flow from source to drain: I_D flows. 4. Larger V_GS → thicker channel → larger I_D. Hence the name "enhancement". 5. **Effect of V_DS:** as V_DS increases, the channel near the drain narrows. When V_DS ≥ V_GS − V_T, the channel is **pinched off** at the drain end and I_D saturates. In saturation: **I_D = k (V_GS − V_T)²**, valid for V_GS > V_T. ```text I_D | ______ V_GS = 6 V | _/______ V_GS = 5 V | _/________ V_GS = 4 V |_______/__________ V_GS ≤ V_T 0 V_DS ``` E-MOSFETs are used as switches in digital ICs (CMOS) because they are normally OFF. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is true of an n-channel E-MOSFET at V_GS = 0? A. A channel exists and I_D = I_DSS B. No channel exists; source and drain are separated by p-material, I_D about 0 C. A p-channel forms D. The gate current is large Answer: B. Back-to-back pn junctions block conduction until a channel is induced. (Key point: No built-in channel) 2. What forms the channel when V_GS >= V_T? A. Holes accumulate under the gate B. A diffused n-layer widens C. Electrons attracted under the gate form an n-type inversion layer D. The oxide breaks down Answer: C. The positive gate attracts minority electrons, forming an inversion layer connecting source and drain. (Key point: Channel formation) 3. Pinch-off occurs when: A. V_DS = 0 B. V_GS = 0 C. V_GS <= V_T D. V_DS >= V_GS - V_T Answer: D. At the drain end the channel is pinched off and I_D saturates, I_D = k(V_GS - V_T)^2. (Key point: Pinch-off) 4. Why is the gate current practically zero? A. The gate is insulated by SiO2 B. The gate is reverse-biased pn junction C. The channel is p-type D. V_DS is zero Answer: A. The oxide layer gives input resistance of 10^10 to 10^15 ohm. (Key point: Why high input resistance) ## Related in Fundamental of Electrical and Electronics Engineering - [n-channel depletion MOSFET operation](https://www.bctengineer.com/question.md?key=semester_1%2Ffundamental_of_electrical_and_electronics_engineering%3Adepletion-mosfet-operation) — Fundamental of Electrical and Electronics Engineering, chapter 5 ## Related in other subjects - [N-channel enhancement MOSFET construction, working](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Amosfet-n-channel-enhancement) — Basic Electronics Engineering, chapter 3, asked 9× - [N-channel depletion MOSFET construction, working](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Amosfet-n-channel-depletion) — Basic Electronics Engineering, chapter 3, asked 9× - [n-channel E-MOSFET construction and working](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3An-emosfet-construction-working) — Electronics Devices and Circuit, chapter 3, asked 9× - [MOSFET construction and working principle](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Amosfet-construction-working) — Basic Electronics Engineering, chapter 3, asked 2×