--- title: "K-map: x'yz + x'y'z + xyz with gates" subject: "Basic Electronics Engineering" chapter: 6 key: "semester_2/basic_electronics_engineering:kmap-xyz-realize-gates" source: https://www.bctengineer.com/q/semester_2/basic_electronics_engineering/kmap-xyz-realize-gates site: BCT Engineering --- # K-map: x'yz + x'y'z + xyz with gates Basic Electronics Engineering · Chapter 6: Digital Electronics - Asked in: 2073 Bhadra, 5 marks; 2069 Poush, 2+2 marks (asked 2 times) - Video: [Boolean Expression Solving using K-Map](https://www.youtube.com/watch?v=ewkhVRIzsN0) — TutorialsPoint - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_2/basic_electronics_engineering/kmap-xyz-realize-gates - Whole chapter: https://www.bctengineer.com/md/semester_2/basic_electronics_engineering/chapter-6 ## Question Simplify the expression using K-Map, F(x,y,z) = X'YZ + X'Y'Z + XYZ and realize it using logic gates. ## Short answer F(x,y,z) = X'YZ + X'Y'Z + XYZ simplifies to z(x' + y). K-map grouping gives x'z + yz = z(x'+y). Realization: a NOT gate inverts x, an OR gate combines x' and y, and an AND gate takes the OR output and z to produce F. ## Answer F(x,y,z) = x'yz + x'y'z + xyz = m3 + m1 + m7 = Σm(1, 3, 7). #### K-map ```text yz 00 01 11 10 x = 0 | 0 | 1 | 1 | 0 | x = 1 | 0 | 0 | 1 | 0 | ``` Groups: - Pair (m1, m3): x = 0, z = 1, y varies gives **x'z**. - Pair (m3, m7): y = 1, z = 1, x varies gives **yz**. F = x'z + yz = z(x' + y) #### Realization using logic gates ```text x ---[NOT]---+ +--[OR]----+ y -----------+ +--[AND]---- F z -----------------------+ ``` The circuit needs one NOT, one OR and one AND gate. (The SOP form x'z + yz needs one NOT gate, two AND gates and one OR gate.) ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. x'yz + x'y'z + xyz equals: A. Sigma m(1, 3, 7) B. Sigma m(1, 3, 5) C. Sigma m(0, 3, 7) D. Sigma m(3, 5, 7) Answer: A. The answer states this: Sigma m(1, 3, 7). (Key point: Minterm list) 2. The pair (m1, m3) gives: A. yz B. x'z C. x'y D. xz Answer: B. The answer states this: x'z. (Key point: Group (m1, m3)) 3. The simplified function is: A. F = x'y + yz B. F = x'z + xy C. F = x'z + yz = z(x' + y) D. F = z(x + y) Answer: C. The answer states this: F = x'z + yz = z(x' + y). (Key point: Simplified result) 4. The factored form z(x' + y) needs: A. Two NOT and two AND gates B. One NOT and one NAND gate C. Three OR gates D. One NOT, one OR and one AND gate Answer: D. The answer states this: One NOT, one OR and one AND gate. (Key point: Gate count) ## Related in Basic Electronics Engineering - [K-map and universal gate: xy + x'z + yz](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-universal-gate-xy) — Basic Electronics Engineering, chapter 6 - [K-map: 3-variable five-term expression](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-xyz-five-term) — Basic Electronics Engineering, chapter 6 - [K-map: two 3-variable functions](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-two-expressions) — Basic Electronics Engineering, chapter 6 - [K-map: A'B + BC' + AC'](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-abc-simple) — Basic Electronics Engineering, chapter 6, asked 2× - [K-map: 4-variable minterm list](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-4var-sigma) — Basic Electronics Engineering, chapter 6 - [K-map: A'BC' + ABC' + ABC](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-abc-three-term) — Basic Electronics Engineering, chapter 6 ## Related in other subjects - [K-map Σ(0,1,4,8,10,11,12)+d, realize circuit](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-realize-circuit-01248) — Digital Logic, chapter 3, asked 2× - [K-map Σ(0,2,3,4,7,8,10,13)+d, logic circuit](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-logic-circuit-0234) — Digital Logic, chapter 3 - [Minterms/maxterms; K-map Σm(2,4,5,13,14)+d, universal gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aminterm-maxterm-kmap-universal) — Digital Logic, chapter 3 - [Universal gates; positive and negative logic](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Auniversal-gates-positive-logic) — Digital Logic, chapter 2