---
title: "MOSFET construction and working principle"
subject: "Basic Electronics Engineering"
chapter: 3
key: "semester_2/basic_electronics_engineering:mosfet-construction-working"
source: https://www.bctengineer.com/q/semester_2/basic_electronics_engineering/mosfet-construction-working
site: BCT Engineering
---

# MOSFET construction and working principle

Basic Electronics Engineering · Chapter 3: Transistor

- Asked in: 2070 Bhadra, 6 marks; 2069 Poush, 6 marks (asked 2 times)
- Video: [MOSFET - Enhancement Type MOSFET Explained (Construction, Working and Characteristics Explained)](https://www.youtube.com/watch?v=l9LBIy9Ioxo) — ALL ABOUT ELECTRONICS
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_2/basic_electronics_engineering/mosfet-construction-working
- Whole chapter: https://www.bctengineer.com/md/semester_2/basic_electronics_engineering/chapter-3

## Question

Explain the construction and working principle of MOSFET.

## Short answer

MOSFET consists of two n⁺ (source/drain) regions in p-substrate, with SiO₂ layer and gate on top. For n-channel enhancement type, positive VGS > VT induces an n-channel inversion layer, allowing current flow. In triode region ID=k[2(VGS−VT)VDS−VDS²], in saturation ID=k(VGS−VT)². Features: high input impedance, voltage-controlled.

## Answer

A **MOSFET** is a field-effect transistor in which an insulated gate (metal-oxide-semiconductor structure) controls the conducting channel between source and drain by an electric field. The most common type is the n-channel enhancement MOSFET.

#### Construction
- A p-type silicon substrate (body).
- Two heavily doped n⁺ regions, the **source** and the **drain**.
- A thin SiO₂ insulating layer over the surface between them.
- A metal or polysilicon **gate** on the oxide.
- Terminals: source (S), gate (G), drain (D), body (B, normally tied to the source).

```text
        S      G      D
        |   +------+  |
      --+   | gate |  +--
     | n+   +------+   n+ |
     |    ==== SiO2 ====  |
     |     p-substrate    |
     +---------B----------+
```

#### Working principle (n-channel enhancement type)
1. **VGS = 0:** there are two back-to-back PN junctions between source and drain, so ID = 0.
2. **Positive VGS:** the gate and the substrate form a capacitor. The positive gate repels holes and attracts electrons toward the oxide interface.
3. **VGS ≥ VT (threshold):** an **inversion layer** of electrons (the n-channel) forms under the oxide, connecting source and drain.
4. **With VDS > 0:** electrons drift from source to drain, so the current ID flows from drain to source.
5. As VDS rises, the channel narrows near the drain. At VDS = VGS − VT, the channel **pinches off** and ID saturates.

#### Equations
- Ohmic (triode): ID = k[2(VGS − VT)VDS − VDS²]
- Saturation: ID = k(VGS − VT)²

where k = μnCox W/(2L).

```text
 ID                        ID
  |   VGS4 ____            |       /
  |   VGS3 ____            |     /
  |   VGS2 ____            |   /
  +-------- VDS            +--+---- VGS
  Output characteristic    VT   Transfer
```

**Types:** n-channel and p-channel, each as enhancement or depletion type. The depletion type has a built-in channel and conducts at VGS = 0.

**Features:** very high input impedance, very low gate current, small size and low power; used in digital ICs (CMOS), switches and amplifiers.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which structure describes an n-channel enhancement MOSFET?
   A. n-type substrate with two p+ regions and a metal gate directly on the silicon
   B. p-type substrate, two n+ source and drain regions, and a gate on a thin SiO2 layer
   C. p-type substrate with a built-in n channel between the source and drain
   D. Two PN junctions in series with a base terminal
   Answer: B. The gate is insulated from the p-type body by SiO2, with heavily doped n+ source and drain at either side. (Key point: Construction)

2. At VGS = 0 in an enhancement n-channel MOSFET, why is ID zero?
   A. The gate oxide conducts nothing
   B. There are two back-to-back PN junctions between source and drain
   C. The channel is pinched off
   D. VDS is zero
   Answer: B. With no channel, source-body and body-drain junctions oppose each other, so no current flows. (Key point: VGS = 0 behaviour)

3. What happens when VGS reaches the threshold VT?
   A. Holes flow into the gate
   B. An inversion layer of electrons forms under the oxide connecting source and drain
   C. The oxide breaks down
   D. The substrate becomes n-type everywhere
   Answer: B. The positive gate repels holes and attracts electrons, forming an n-type inversion channel. (Key point: Channel formation)

4. At what point does the channel pinch off and ID saturate?
   A. VDS = VGS + VT
   B. VDS = VGS - VT
   C. VDS = VT
   D. VDS = 0
   Answer: B. At VDS = VGS - VT the channel narrows to zero near the drain, after which ID = k(VGS - VT)^2 stays nearly constant. (Key point: Pinch-off)

## Related in Basic Electronics Engineering

- [N-channel enhancement MOSFET construction, working](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Amosfet-n-channel-enhancement) — Basic Electronics Engineering, chapter 3, asked 9×
- [N-channel depletion MOSFET construction, working](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Amosfet-n-channel-depletion) — Basic Electronics Engineering, chapter 3, asked 9×

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