---
title: "ASCII code and binary-to-Excess-3 converter"
subject: "Digital Logic"
chapter: 1
key: "semester_3/digital_logic:ascii-binary-excess3-converter"
source: https://www.bctengineer.com/q/semester_3/digital_logic/ascii-binary-excess3-converter
site: BCT Engineering
---

# ASCII code and binary-to-Excess-3 converter

Digital Logic · Chapter 1: Introduction

- Asked in: 2082 Shrawan, 2+6 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/ascii-binary-excess3-converter
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-1

## Question

Define an ASCII code. Design a binary to excess-3 code converter circuit using basic gates.

## Short answer

ASCII is a 7-bit code for 128 characters. A BCD-to-excess-3 converter adds 3 (0011) to a 4-bit digit; simplified expressions: W=A+BC+BD, X=B'C+B'D+BC'D', Y=CD+C'D', Z=D'. It uses AND, OR, NOT gates.

## Answer

#### ASCII code
**ASCII (American Standard Code for Information Interchange)** is a 7-bit alphanumeric code that represents 128 characters: letters, digits, symbols and control characters. Example: 'A' = 65 = 100 0001, 'a' = 97 = 110 0001, '0' = 48 = 011 0000.

#### Binary (BCD) to Excess-3 code converter
Inputs: 4-bit binary/BCD digit $ABCD$ ($A$ = MSB), valid 0–9. Outputs: Excess-3 code $WXYZ$ = input + 3. Inputs 10–15 never occur, so they are **don't cares (X)**.

| Dec | A | B | C | D | W | X | Y | Z |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 |
| 2 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| 3 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 |
| 4 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
| 5 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| 6 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 |
| 7 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 |
| 8 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 |
| 9 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 |

#### K-map simplification
Minterms (don't cares $d = 10$–$15$):
- $W = \sum m(5,6,7,8,9) + d$
- $X = \sum m(1,2,3,4,9) + d$
- $Y = \sum m(0,3,4,7,8) + d$
- $Z = \sum m(0,2,4,6,8) + d$

K-map for $W$ (rows $AB$, columns $CD$):

```text
          CD
 AB     00  01  11  10
 00   |  0 | 0 | 0 | 0 |
 01   |  0 | 1 | 1 | 1 |
 11   |  X | X | X | X |
 10   |  1 | 1 | X | X |
```

Groups: $A$ (rows 11 and 10), $BD$, $BC$.

Simplified expressions:

$$
\begin{aligned}
W &= A + BC + BD \\
X &= \bar B C + \bar B D + B\bar C\bar D \\
Y &= CD + \bar C\bar D \\
Z &= \bar D
\end{aligned}
$$

(Each equation can be checked against all ten rows of the truth table.)

#### Logic circuit (basic gates)

```text
 A ----------------------------+
 B --+--[AND]-- BC ------------+--[OR]--- W
 C --+                         |
 B --+--[AND]-- BD ------------+
 D --+

 B'--+--[AND]-- B'C -----------+
 C --+                         |
 B'--+--[AND]-- B'D -----------+--[OR]--- X
 D --+                         |
 B --+                         |
 C'--+--[AND]-- BC'D' ---------+
 D'--+

 C --+--[AND]-- CD ------------+--[OR]--- Y
 D --+                         |
 C'--+--[AND]-- C'D' ----------+
 D'--+

 D ----[NOT]---------------------------- Z
```

NOT gates generate $\bar B$, $\bar C$ and $\bar D$; the $\bar D$ inverter also drives output Z directly. The circuit therefore uses 7 AND gates, 3 OR gates and 3 NOT gates.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is ASCII?
   A. An 8-bit weighted BCD code
   B. A 7-bit alphanumeric code for 128 characters
   C. A code where successive values differ by one bit
   D. A 4-bit code for decimal digits
   Answer: B. ASCII is for text. (Key point: ASCII)

2. Why are inputs 10-15 don't cares in the BCD to XS-3 converter?
   A. They give zero outputs
   B. They are inverted
   C. They never occur as valid BCD digits
   D. They are the same as 0-5
   Answer: C. Don't cares allow bigger K-map groups. (Key point: Don't cares)

3. What is the simplified Z output (LSB)?
   A. Z = D
   B. Z = C'D'
   C. Z = CD
   D. Z = D'
   Answer: D. XS-3 LSB is the complement of the BCD LSB. (Key point: Outputs)

4. What is the simplified W (MSB) output?
   A. W = A + BC + BD
   B. W = A'BC
   C. W = AB
   D. W = BC + CD
   Answer: A. W is 1 for digits 5 to 9. (Key point: W output)

## Close variants set in other exams

- [Excess-3 code and binary-to-Excess-3 converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aexcess3-binary-converter) — Digital Logic, chapter 1, asked 2×

## Related in Digital Logic

- [Gray code and 3-bit binary-to-Gray converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Agray-code-binary-gray-converter) — Digital Logic, chapter 1
- [BCD code and 3-bit binary-to-Gray converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-code-gray-converter) — Digital Logic, chapter 1
- [ASCII code with examples](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aascii-code-explain) — Digital Logic, chapter 1, asked 2×
- [Importance of coding and ASCII code](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Acoding-importance-ascii) — Digital Logic, chapter 1
- [Excess-3 code with examples](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aexcess3-code-explain) — Digital Logic, chapter 1, asked 4×

## Related in other subjects

- [Excess gain compensation in Sallen-Key circuit](https://www.bctengineer.com/question.md?key=semester_5%2Ffilter_design%3Asallen-key-excess-gain-compensation) — Filter Design, chapter 6, asked 3×
