---
title: "Seven-segment \"b\" and \"d\" segments"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:b-d-segments"
source: https://www.bctengineer.com/q/semester_3/digital_logic/b-d-segments
site: BCT Engineering
---

# Seven-segment "b" and "d" segments

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2081 Bhadra, 3+3 marks
- Video: [Seven Segment Display Decoder (Part 2)](https://www.youtube.com/watch?v=_qGFpgpqf7s) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/b-d-segments
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

Realize logic circuit for segment "b" and "d" of the seven segment display decoder.

## Short answer

Segment b: b = B' + (C ⊙ D). Segment d: d = A + B'D' + B'C + CD' + BC'D. Both expressions use don’t-cares for invalid BCD inputs 10–15 to simplify logic.

## Answer

A BCD-to-seven-segment decoder takes BCD input $ABCD$ ($A$ = MSB) and drives segments a–g. Inputs 10–15 never occur, so they are don't-cares (X).

```text
     a
    ---
 f | g | b
    ---
 e |   | c
    ---
     d
```

#### Segment "b"

Segment b is ON for digits 0, 1, 2, 3, 4, 7, 8, 9 (OFF for 5, 6).

$$
b = \Sigma m(0,1,2,3,4,7,8,9) + d(10\text{–}15)
$$

| AB \ CD | 00 | 01 | 11 | 10 |
|---|---|---|---|---|
| 00 | 1 | 1 | 1 | 1 |
| 01 | 1 | 0 | 1 | 0 |
| 11 | X | X | X | X |
| 10 | 1 | 1 | X | X |

Groups: $B'$ (rows 00 and 10), $C'D'$ (column 00), $CD$ (column 11).

$$
b = B' + C'D' + CD = B' + (C \odot D)
$$

```text
 B ---[NOT]---------------+
 C --+                    +--[OR]--- b
 D --+--[XNOR]------------+
```

#### Segment "d"

Segment d is ON for digits 0, 2, 3, 5, 6, 8, 9 (OFF for 1, 4, 7).

$$
d = \Sigma m(0,2,3,5,6,8,9) + d(10\text{–}15)
$$

| AB \ CD | 00 | 01 | 11 | 10 |
|---|---|---|---|---|
| 00 | 1 | 0 | 1 | 1 |
| 01 | 0 | 1 | 0 | 1 |
| 11 | X | X | X | X |
| 10 | 1 | 1 | X | X |

Groups: $A$ (rows 11, 10); $B'D'$ (corners 0, 2, 8, 10); $B'C$ (2, 3, 10, 11); $CD'$ (2, 6, 10, 14); $BC'D$ (5 with 13).

$$
d = A + B'D' + B'C + CD' + BC'D
$$

```text
 B',D' ---[AND]---+
 B',C  ---[AND]---+
 C,D'  ---[AND]---+--[OR 5]--- d
 B,C',D --[AND]---+
 A ---------------+
```

**Check:** digit 5 ($0101$): $b = 0 + 0 + 0 = 0$ (b off) and $d = BC'D = 1$ (d on). Digit 7 ($0111$): $b = CD = 1$ and every term of $d$ is 0. Both expressions were verified for digits 0–9.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why are inputs 10 to 15 don't-cares in the seven-segment decoder?
   A. They light every segment
   B. They are invalid BCD codes that never occur
   C. They represent hexadecimal letters in BCD
   D. They turn the display off
   Answer: B. BCD digits are only 0 to 9, so those six codes can be used to simplify the K-maps. (Key point: Don't-cares)

2. For which digits is segment b OFF?
   A. 1 and 4
   B. 7 and 8
   C. 5 and 6
   D. 2 and 3
   Answer: C. Segment b (upper right) is lit for 0,1,2,3,4,7,8,9 and off for 5 and 6. (Key point: Segment b)

3. What is the simplified expression for b?
   A. b = B + CD
   B. b = A + B'D'
   C. b = B' + C xor D
   D. b = B' + C'D' + CD = B' + (C xnor D)
   Answer: D. Groups B', C'D' and CD give B' + (C xnor D). (Key point: Expression for b)

4. Segment d is OFF for which digits, and what is included in its expression?
   A. 1, 4 and 7; d = A + B'D' + B'C + CD' + BC'D
   B. 2, 3 and 5; d = B + CD
   C. 0 and 8; d = A'B'
   D. 1 only; d = A + C
   Answer: A. Segment d (bottom) is lit for 0,2,3,5,6,8,9 and off for 1,4,7. (Key point: Segment d)

## Related in Digital Logic

- [BCD-to-seven-segment decoder, segments a and e](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-seven-segment-a-e) — Digital Logic, chapter 4
- [DEMUX vs decoder; seven-segment "b" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-decoder-b-segment) — Digital Logic, chapter 4
- [Seven-segment decoder "b" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ab-segment-seven-segment) — Digital Logic, chapter 4, asked 2×
- [Seven-segment "a" segment using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aa-segment-nor-gates) — Digital Logic, chapter 4
- [Seven-segment "e" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ae-segment-seven-segment) — Digital Logic, chapter 4
- [BCD-to-7-segment decoder; frequency counter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-7segment-frequency-counter) — Digital Logic, chapter 11

## Related in other subjects

- [Seven segment display and clock counter](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aseven-segment-clock-design) — Embedded System, chapter 9
- [Display 99 to 00 on seven segment](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-seven-segment-99-00) — Embedded System, chapter 9
- [Display 0 to 9 on seven segment](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-seven-segment-0-9) — Embedded System, chapter 9, asked 2×
- [BCD counter 0-9999 on seven segment VHDL](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Avhdl-bcd-counter-seven-segment) — Embedded System, chapter 9