--- title: "Seven-segment decoder \"b\" segment" subject: "Digital Logic" chapter: 4 key: "semester_3/digital_logic:b-segment-seven-segment" source: https://www.bctengineer.com/q/semester_3/digital_logic/b-segment-seven-segment site: BCT Engineering --- # Seven-segment decoder "b" segment Digital Logic · Chapter 4: Data Processing Circuits - Asked in: 2075 Chaitra, 6 marks; 2072 Chaitra, 7 marks (asked 2 times) - Video: [Seven Segment Display Decoder (Part 2)](https://www.youtube.com/watch?v=_qGFpgpqf7s) — Neso Academy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/b-segment-seven-segment - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4 ## Question Design a simplest logic circuit for 'b' segment of the BCD-to-7 segment display decoder. ## Short answer For BCD inputs ABCD, segment b is ON for digits 0–4,7,8,9. The minimal expression is b = B' + (C ⊙ D), implemented with one XNOR gate and one OR gate after inverting B. ## Answer A BCD-to-7-segment decoder converts a 4-bit BCD digit $ABCD$ (A = MSB) into the seven signals a–g that light the segments of a display. Assume a common-cathode display, so a segment glows when its signal is 1. ```text a ───── │ │ f│ │b │ g │ ───── │ │ e│ │c │ │ ───── d ``` #### Truth table for segment b Segment b (upper right) is ON for digits 0, 1, 2, 3, 4, 7, 8, 9 and OFF for 5 and 6. Inputs 1010–1111 are not valid BCD, so they are don't-cares. | Digit | A B C D | b | |---|---|---| | 0 | 0 0 0 0 | 1 | | 1 | 0 0 0 1 | 1 | | 2 | 0 0 1 0 | 1 | | 3 | 0 0 1 1 | 1 | | 4 | 0 1 0 0 | 1 | | 5 | 0 1 0 1 | 0 | | 6 | 0 1 1 0 | 0 | | 7 | 0 1 1 1 | 1 | | 8 | 1 0 0 0 | 1 | | 9 | 1 0 0 1 | 1 | | 10–15 | invalid | X | $$ b = \Sigma m(0,1,2,3,4,7,8,9) + d(10,11,12,13,14,15) $$ #### K-map ```text CD AB 00 01 11 10 +---+---+---+---+ 00 | 1 | 1 | 1 | 1 | +---+---+---+---+ 01 | 1 | 0 | 1 | 0 | +---+---+---+---+ 11 | X | X | X | X | +---+---+---+---+ 10 | 1 | 1 | X | X | +---+---+---+---+ ``` - Octet m(0,1,2,3,8,9,10,11) → $\overline{B}$ - Quad m(0,4,8,12) → $\overline{C}\,\overline{D}$ - Quad m(3,7,11,15) → $CD$ $$ b = \overline{B} + \overline{C}\,\overline{D} + CD = \overline{B} + (C \odot D) $$ Check: digit 5 ($B=1$, $C=0$, $D=1$): $\overline{B}=0$, $\overline{C}\,\overline{D}=0$, $CD=0$, so b = 0. Digit 6 ($B=1$, $C=1$, $D=0$): b = 0. All other digits give 1. #### Simplest logic circuit Since $\overline{C}\,\overline{D} + CD = \overline{C \oplus D}$, segment b needs only one X-NOR gate, one NOT gate and one OR gate: ```text B ──[NOT]── B' ──────────┐ [OR]── b C ──┐ │ [XNOR]── C⊙D ────────┘ D ──┘ ``` (If X-NOR is not allowed, use three NOT gates, two AND gates and a 3-input OR for $\overline{B} + \overline{C}\,\overline{D} + CD$.) ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. For which BCD digits is segment b OFF? A. 1 and 4 B. 5 and 6 C. 2 and 3 D. 8 and 9 Answer: B. Segment b (upper right) is lit for all digits except 5 and 6. (Key point: Segment b truth table) 2. Why are input codes 1010–1111 treated as don't-cares? A. They always turn b on B. They are invalid BCD and never occur C. They turn b off D. They represent negative digits Answer: B. BCD digits go only up to 9, so these codes never occur and can help form larger groups. (Key point: Don't-cares) 3. What is the simplified expression for segment b? A. B' + C'D' + CD = B' + (C ⊙ D) B. B + C ⊕ D C. A' + CD D. B' + C ⊕ D Answer: A. The octet gives B', and the quads C'D' and CD combine to the XNOR of C and D. (Key point: Simplified b) 4. What is the simplest circuit for b? A. One NOT, one XNOR and one OR B. Two NOT, two AND and a 3-input OR only C. One NAND and one NOR D. Three XOR gates Answer: A. Since C'D' + CD = (C ⊕ D)', b = B' + XNOR(C, D) needs one NOT, one XNOR and one OR. (Key point: Gate count) ## Related in Digital Logic - [BCD-to-seven-segment decoder, segments a and e](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-seven-segment-a-e) — Digital Logic, chapter 4 - [DEMUX vs decoder; seven-segment "b" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-decoder-b-segment) — Digital Logic, chapter 4 - [BCD-to-7-segment decoder; frequency counter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-7segment-frequency-counter) — Digital Logic, chapter 11 - [Seven-segment "a" segment using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aa-segment-nor-gates) — Digital Logic, chapter 4 - [Seven-segment "e" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ae-segment-seven-segment) — Digital Logic, chapter 4 - [Seven-segment "b" and "d" segments](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ab-d-segments) — Digital Logic, chapter 4 ## Related in other subjects - [BCD counter 0-9999 on seven segment VHDL](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Avhdl-bcd-counter-seven-segment) — Embedded System, chapter 9 - [Seven segment display and clock counter](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aseven-segment-clock-design) — Embedded System, chapter 9 - [Display 99 to 00 on seven segment](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-seven-segment-99-00) — Embedded System, chapter 9 - [Display 0 to 9 on seven segment](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-seven-segment-0-9) — Embedded System, chapter 9, asked 2×