--- title: "BCD synchronous counter using T flip-flops" subject: "Digital Logic" chapter: 8 key: "semester_3/digital_logic:bcd-synchronous-counter-t" source: https://www.bctengineer.com/q/semester_3/digital_logic/bcd-synchronous-counter-t site: BCT Engineering --- # BCD synchronous counter using T flip-flops Digital Logic · Chapter 8: Counters - Asked in: 2076 Asoj, 7 marks - Video: [Synchronous BCD Counter using T Flip-Flop | Logic Circuit Design | KTU | MALAYALAM](https://www.youtube.com/watch?v=1iCSGRkUnKI) — KTU CLASSROOM by NEENU - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/bcd-synchronous-counter-t - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-8 ## Question Design BCD synchronous counter with circuit diagram, truth table and timing waveform. Use T flip-flop. ## Short answer A BCD synchronous counter with T flip-flops uses 4 flip-flops, counting 0000 to 1001. The T inputs are T3 = Q3Q0 + Q2Q1Q0, T2 = Q1Q0, T1 = Q3'Q0, T0 = 1. Unused states lead to valid counts, making it self-starting. ## Answer A **BCD (decade) synchronous counter** counts 0000 to 1001 and returns to 0000 on the 10th clock. All T flip-flops share the clock. A T flip-flop toggles when $T = 1$ and holds when $T = 0$, so $T = Q \oplus Q^+$. #### Truth (excitation) table 4 flip-flops are needed ($2^4 = 16 \ge 10$); states 1010–1111 are don't cares. | Present Q3Q2Q1Q0 | Next Q3Q2Q1Q0 | T3 | T2 | T1 | T0 | |---|---|---|---|---|---| | 0000 | 0001 | 0 | 0 | 0 | 1 | | 0001 | 0010 | 0 | 0 | 1 | 1 | | 0010 | 0011 | 0 | 0 | 0 | 1 | | 0011 | 0100 | 0 | 1 | 1 | 1 | | 0100 | 0101 | 0 | 0 | 0 | 1 | | 0101 | 0110 | 0 | 0 | 1 | 1 | | 0110 | 0111 | 0 | 0 | 0 | 1 | | 0111 | 1000 | 1 | 1 | 1 | 1 | | 1000 | 1001 | 0 | 0 | 0 | 1 | | 1001 | 0000 | 1 | 0 | 0 | 1 | #### K-map simplification | T1: Q3Q2 / Q1Q0 | 00 | 01 | 11 | 10 | |---|---|---|---|---| | 00 | 0 | 1 | 1 | 0 | | 01 | 0 | 1 | 1 | 0 | | 11 | X | X | X | X | | 10 | 0 | 0 | X | X | | T3: Q3Q2 / Q1Q0 | 00 | 01 | 11 | 10 | |---|---|---|---|---| | 00 | 0 | 0 | 0 | 0 | | 01 | 0 | 0 | 1 | 0 | | 11 | X | X | X | X | | 10 | 0 | 1 | X | X | Similarly $T_2$ is 1 for states 0011 and 0111, giving $T_2 = Q_1Q_0$, and $T_0 = 1$. $$ \begin{aligned} &T_3 = Q_3Q_0 + Q_2Q_1Q_0 \\ &T_2 = Q_1Q_0 \\ &T_1 = \overline{Q_3}Q_0 \\ &T_0 = 1 \end{aligned} $$ #### Circuit diagram ```text +-----+ +-----+ +-----+ +-----+ T0>|T Q|-Q0 T1>|T Q|-Q1 T2>|T Q|-Q2 T3>|T Q|-Q3 | FF0 | | FF1 | | FF2 | | FF3 | | | | | | | | | +--o--+ +--o--+ +--o--+ +--o--+ | | | | CLK---+-------------+-------------+-------------+ T0 = 1 T1 = Q3'.Q0 T2 = Q1.Q0 T3 = Q3.Q0 + Q2.Q1.Q0 ``` #### Timing waveform ```text CLK __|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾ Q3 ________________________________|‾‾‾‾‾‾‾|_______ Q2 ________________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|_______________ Q1 ________|‾‾‾‾‾‾‾|_______|‾‾‾‾‾‾‾|_______________ Q0 ____|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾ Cnt 0 1 2 3 4 5 6 7 8 9 0 1 ``` - $Q_0$ toggles on every falling edge ($f_{clk}/2$). - $Q_1$ toggles when $Q_0 = 1$, except at 9 where $\overline{Q_3} = 0$ blocks it. - $Q_2$ toggles when $Q_1Q_0 = 1$ (at 3 → 4 and 7 → 8). - $Q_3$ sets at 7 → 8 ($Q_2Q_1Q_0 = 1$) and resets at 9 → 0 ($Q_3Q_0 = 1$); its frequency is $f_{clk}/10$. Unused states return to the count (1010→1011→0110, 1100→1101→0100, 1110→1111→0010), so the counter is self-starting. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How is the T input found from present and next states of a T flip-flop? A. T = Q + Q+ B. T = Q xor Q+ C. T = Q . Q+ D. T = Q+ Answer: B. A T flip-flop toggles when T = 1, so T = 1 exactly when Q changes: T = Q xor Q+. (Key point: T flip-flop excitation) 2. At which present states is T2 = 1 in the BCD counter? A. 0011 and 0111 B. 0111 and 1001 C. 0001 and 0011 D. 0101 and 1001 Answer: A. Q2 changes at 3 to 4 and 7 to 8, i.e. when Q1Q0 = 1 in states 0011 and 0111. (Key point: Truth table values) 3. Which set of T equations is correct for the BCD counter? A. T0 = 1, T1 = Q3'Q0, T2 = Q1Q0, T3 = Q3Q0 + Q2Q1Q0 B. T0 = 1, T1 = Q0, T2 = Q1Q0, T3 = Q2Q1Q0 C. T0 = Q0, T1 = Q3'Q0, T2 = Q1, T3 = Q3 + Q2 D. T0 = 1, T1 = Q3Q0, T2 = Q1Q0, T3 = Q3'Q2Q1Q0 Answer: A. T1 is blocked at 9 by Q3', and T3 toggles at 7 to 8 (Q2Q1Q0) and 9 to 0 (Q3Q0). (Key point: Equations) 4. Why does Q1 not toggle at the 9 to 0 transition? A. T1 = Q3'Q0 and Q3 = 1 at 9, so T1 = 0 B. Q0 is 0 at 9 C. Q1 is a don't care at 9 D. The clock is disabled at 9 Answer: A. At 1001 Q1 is already 0 and must stay 0, so the Q3' term makes T1 = 0. (Key point: Why Q1 is blocked) 5. What happens to unused state 1010 on the next clock? A. It stays at 1010 B. It goes to 1011 then 0110, entering the valid count C. It goes to 0000 directly D. It goes to 1001 Answer: B. With the derived T equations the unused states return to the count (1010 to 1011 to 0110), so the counter is self-starting. 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