--- title: "Combinational vs sequential; BCD-to-decimal decoder" subject: "Digital Logic" chapter: 4 key: "semester_3/digital_logic:bcd-to-decimal-decoder" source: https://www.bctengineer.com/q/semester_3/digital_logic/bcd-to-decimal-decoder site: BCT Engineering --- # Combinational vs sequential; BCD-to-decimal decoder Digital Logic · Chapter 4: Data Processing Circuits - Asked in: 2073 Shrawan, 2+6 marks - Video: [Q. 4.24: Design a BCD-to-decimal decoder using the unused combinations of the BCD code as don’t-care](https://www.youtube.com/watch?v=t0YfwqFURf8) — Dr. Dhiman (Learn the art of problem solving) - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/bcd-to-decimal-decoder - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4 ## Question Differentiate between combinational and sequential circuits. Explain BCD-to-Decimal decoder circuit with suitable diagram. ## Short answer Combinational circuits have no memory and output depends only on current inputs; sequential circuits use memory elements and past state. A BCD-to-decimal decoder activates one of ten outputs for valid 4-bit BCD inputs (0–9), with don't-care conditions for invalid codes 10–15 simplifying logic. ## Answer #### Combinational vs sequential circuits | Point | Combinational | Sequential | |---|---|---| | Output depends on | Present inputs only | Present inputs and past state | | Memory | None | Has memory (flip-flops) | | Feedback | No | Yes | | Clock | Not needed | Usually needed (synchronous) | | Building blocks | Gates | Gates + flip-flops | | Examples | Adder, MUX, decoder | Counter, register, FSM | #### BCD-to-decimal decoder A **BCD-to-decimal (4-line to 10-line) decoder** accepts a 4-bit BCD code $ABCD$ ($A$ = MSB) and makes exactly one of ten outputs $D_0$–$D_9$ active, showing the decimal digit. The 7442 is the TTL IC (active-low outputs). **Truth table** | ABCD | Active output | ABCD | Active output | |---|---|---|---| | 0000 | $D_0$ | 0101 | $D_5$ | | 0001 | $D_1$ | 0110 | $D_6$ | | 0010 | $D_2$ | 0111 | $D_7$ | | 0011 | $D_3$ | 1000 | $D_8$ | | 0100 | $D_4$ | 1001 | $D_9$ | Codes 1010–1111 are invalid in BCD, so they are don't-cares. **Output expressions.** With full decoding each output is a 4-variable minterm, e.g. $D_5 = A'BC'D$. Using the don't-cares (K-map grouping), shorter expressions are obtained: | Output | Full decoding | Simplified | |---|---|---| | $D_0$ | $A'B'C'D'$ | $A'B'C'D'$ | | $D_1$ | $A'B'C'D$ | $A'B'C'D$ | | $D_2$ | $A'B'CD'$ | $B'CD'$ | | $D_3$ | $A'B'CD$ | $B'CD$ | | $D_4$ | $A'BC'D'$ | $BC'D'$ | | $D_5$ | $A'BC'D$ | $BC'D$ | | $D_6$ | $A'BCD'$ | $BCD'$ | | $D_7$ | $A'BCD$ | $BCD$ | | $D_8$ | $AB'C'D'$ | $AD'$ | | $D_9$ | $AB'C'D$ | $AD$ | For example, $D_8$: 1000 can be grouped with don't-cares 1010, 1100, 1110, giving $AD'$. **Logic diagram** ```text A B C D | | | |---[NOT]-- D' | | |------[NOT]-- C' | |---------[NOT]-- B' |------------[NOT]-- A' A',B',C',D' --[AND4]--> D0 A',B',C',D --[AND4]--> D1 B',C,D' --[AND3]--> D2 B',C,D --[AND3]--> D3 B,C',D' --[AND3]--> D4 B,C',D --[AND3]--> D5 B,C,D' --[AND3]--> D6 B,C,D --[AND3]--> D7 A,D' --[AND2]--> D8 A,D --[AND2]--> D9 ``` **Working:** for input $0111$, only the gate $BCD$ has all inputs 1, so $D_7 = 1$ and the others are 0. The simplified version gives false outputs for invalid codes (e.g. 1111 activates $D_7$ and $D_9$); if invalid codes must be rejected, full decoding is used, as in the 7442 which keeps all outputs inactive for 1010–1111. Uses: driving decimal indicators (Nixie tubes, LEDs) and selecting one of ten devices. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. In a BCD-to-decimal decoder, why are the input codes 1010 to 1111 treated as don't-cares? A. They are not valid BCD digits and never occur B. They activate all outputs at once C. They represent negative digits D. They always produce output D0 Answer: A. BCD only uses 0000 to 1001, so the six remaining codes never occur and can be used to simplify the K-map. (Key point: Don't-care codes) 2. Using the don't-cares, D8 (code 1000) simplifies to which expression? A. A'B'C'D' B. A D' C. A B' C' D' D. A D Answer: B. 1000 is grouped with don't-cares 1010, 1100 and 1110, leaving only A=1 and D=0, so D8 = AD'. (Key point: Simplified D8) 3. What happens for the invalid input 1111 in the simplified decoder, and how does the 7442 avoid it? A. Only D9 goes active; the 7442 adds a clock B. No output is active; the 7442 uses a latch C. D7 and D9 both go active; the 7442 uses full decoding so all outputs stay inactive D. D0 goes active; the 7442 uses a ROM Answer: C. BCD=1 and AD=1 for 1111, so two outputs fire. The 7442 fully decodes each valid code so invalid codes give no active output. (Key point: Simplified vs full decoding) 4. Why is a decoder classed as a combinational circuit rather than a sequential one? A. It uses flip-flops but no clock B. Its output depends on past states C. It needs feedback from output to input D. Its output depends only on the present inputs and it has no memory Answer: D. Combinational circuits are built from gates only, with no memory or feedback, so output depends on the present inputs alone. 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