--- title: "D and T flip-flops; T to JK conversion" subject: "Digital Logic" chapter: 6 key: "semester_3/digital_logic:d-t-flipflops-t-to-jk" source: https://www.bctengineer.com/q/semester_3/digital_logic/d-t-flipflops-t-to-jk site: BCT Engineering --- # D and T flip-flops; T to JK conversion Digital Logic · Chapter 6: Flip Flops - Asked in: 2080 Bhadra, 4+5 marks - Video: [T Flip Flop to JK Flip Flop Conversion: Designing, Steps, and Circuit](https://www.youtube.com/watch?v=CnFqBC3vIJQ) — Engineering Funda - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/d-t-flipflops-t-to-jk - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-6 ## Question Draw logic diagrams with truth table of D and T Flip-flops. Convert T flip-flop into JK flip-flop. ## Short answer A D flip-flop outputs Q+ = D on the clock edge. A T flip-flop toggles when T=1 and holds when T=0: Q+ = T ⊕ Q. To convert T to JK, derive T = J·Q' + K·Q using AND gates for JQ' and KQ feeding an OR to T; check: JK=00 holds, 01 resets, 10 sets, 11 toggles. ## Answer #### D flip-flop The output copies the D input at each active clock edge: $Q_{n+1} = D$. ```text D --+------------>+------+ S* +------+ | | NAND |----->| NAND |---> Q | CLK --+-->| G1 | Q'->| G3 | | | +------+ +------+ | | +------+ R* +------+ | +-->| NAND |----->| NAND |---> Q' +--[NOT]----->| G2 | Q-->| G4 | +------+ +------+ S = D and R = D' : the forbidden S=R=1 never occurs ``` | CLK | D | Q+ | Action | |---|---|---|---| | no edge | x | Q | No change | | edge | 0 | 0 | Reset | | edge | 1 | 1 | Set | #### T flip-flop The T (toggle) flip-flop holds its state for T = 0 and complements it for T = 1: $Q_{n+1} = T \oplus Q_n$. It is made from a J-K flip-flop with J and K tied together. ```text +---------+ T --+----| J Q |--- Q | | | | CLK|> JK | | | | +----| K Q' |--- Q' +---------+ ``` | CLK | T | Q+ | Action | |---|---|---|---| | no edge | x | Q | No change | | edge | 0 | Q | Hold | | edge | 1 | Q' | Toggle | T flip-flops are used in counters and as divide-by-2 circuits (T = 1). #### Converting T flip-flop into J-K flip-flop **Step 1: excitation table of T flip-flop** (T = 1 whenever the state must change) | Q | Q+ | T | |---|---|---| | 0 | 0 | 0 | | 0 | 1 | 1 | | 1 | 0 | 1 | | 1 | 1 | 0 | **Step 2: conversion table.** For each J, K and Q, take Q+ from the J-K characteristic table and write the T needed: | J | K | Q | Q+ | T | |---|---|---|---|---| | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | 0 | | 0 | 1 | 0 | 0 | 0 | | 0 | 1 | 1 | 0 | 1 | | 1 | 0 | 0 | 1 | 1 | | 1 | 0 | 1 | 1 | 0 | | 1 | 1 | 0 | 1 | 1 | | 1 | 1 | 1 | 0 | 1 | **Step 3: K-map for T** ```text K-map for T Q\JK 00 01 11 10 0 0 0 1 1 1 0 1 1 0 ``` - Group Q = 0, JK = 11 and 10: $J\overline{Q}$. - Group Q = 1, JK = 01 and 11: $KQ$. $$ T = J\,\overline{Q} + K\,Q $$ **Step 4: logic circuit** ```text +-----+ J ------>| | Q' ----->| AND |--+ +-----+ | +----+ +---------+ +->| | | | | OR |---->| T Q |---> Q +->| |CLK->|> T | +-----+ | +----+ | Q' |---> Q' K ------>| | | +---------+ Q ----->| AND |--+ +-----+ (Q and Q' are fed back from the outputs) ``` **Check:** J = K = 1 gives $T = \overline{Q} + Q = 1$ (toggle); J = K = 0 gives T = 0 (hold); J = 1, K = 0 gives $T = \overline{Q}$, so a 0 toggles to 1 and a 1 holds (set); J = 0, K = 1 gives T = Q (reset). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What does a T flip-flop do for T = 1 and T = 0 at the clock edge? A. T = 1 sets, T = 0 resets B. T = 1 toggles, T = 0 holds C. T = 1 holds, T = 0 toggles D. Both copy T into Q Answer: B. Q+ = T xor Q: hold for 0, toggle for 1. (Key point: T flip-flop behaviour) 2. How is a T flip-flop made from a J-K flip-flop? A. J tied to Q, K tied to Q' B. J and K tied together as T C. K grounded D. J = 1, K = 0 Answer: B. Joining J and K gives hold for 00 and toggle for 11. (Key point: T from J-K) 3. What is a T flip-flop with T = 1 used for? A. A divide-by-2 circuit B. A data latch C. A memory of two bits D. A clock stopper Answer: A. It toggles every clock so the output frequency is half the clock. (Key point: Divide by 2) 4. Which expression gives T when converting a T flip-flop to a J-K flip-flop? A. T = J K B. T = J' Q + K Q' C. T = J Q' + K Q D. T = J + K Answer: C. From the K-map, T = J Q' + K Q. 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