---
title: "De Morgan; X-NOR using a universal gate"
subject: "Digital Logic"
chapter: 2
key: "semester_3/digital_logic:demorgan-xnor-universal-gate"
source: https://www.bctengineer.com/q/semester_3/digital_logic/demorgan-xnor-universal-gate
site: BCT Engineering
---

# De Morgan; X-NOR using a universal gate

Digital Logic · Chapter 2: Digital Logic

- Asked in: 2075 Chaitra, 4+2 marks
- Video: [Implementation of all gates using NOR gate | Design with Universal gates | Digital system design](https://www.youtube.com/watch?v=rfaKzj5go-0) — RF Design Basics
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/demorgan-xnor-universal-gate
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-2

## Question

State and prove De Morgan's theorem. Design X-NOR gate using anyone of universal gate.

## Short answer

De Morgan's theorems: (A + B)' = A'B' and (AB)' = A' + B'. An XNOR gate can be built with four NOR gates: compute G1 = (A+B)', G2 = (A+G1)', G3 = (B+G1)', then Y = (G2+G3)' which gives AB + A'B'.

## Answer

#### De Morgan's theorems

De Morgan's theorems tell us how to complement a sum or a product of variables.

**Theorem 1:** The complement of a sum equals the product of the complements.
$$
\overline{A+B} = \overline{A}\cdot\overline{B}
$$

**Theorem 2:** The complement of a product equals the sum of the complements.
$$
\overline{A\cdot B} = \overline{A}+\overline{B}
$$

In words: to complement an expression, change every OR into AND (and every AND into OR) and complement each variable. So a NOR gate is the same as an AND gate with inverted inputs ("bubbled AND"), and a NAND gate is the same as an OR gate with inverted inputs ("bubbled OR").

**Proof by truth table**

| A | B | $A+B$ | $\overline{A+B}$ | $\overline{A}\,\overline{B}$ | $AB$ | $\overline{AB}$ | $\overline{A}+\overline{B}$ |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 |
| 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 |

Column 4 equals column 5 for all inputs, which proves Theorem 1. Column 7 equals column 8, which proves Theorem 2.

**Algebraic proof of Theorem 1:** if $X = A+B$ and $Y = \overline{A}\,\overline{B}$, then $Y$ is the complement of $X$ only if $X+Y=1$ and $X\cdot Y=0$.
$$
\begin{aligned} X+Y &= A+B+\overline{A}\,\overline{B} = A + B + \overline{A} = 1 \\ X\cdot Y &= (A+B)\overline{A}\,\overline{B} = A\overline{A}\,\overline{B} + B\overline{A}\,\overline{B} = 0+0 = 0 \end{aligned}
$$
So $\overline{A+B} = \overline{A}\,\overline{B}$. Theorem 2 follows by duality.

#### X-NOR gate using NOR gates only

$$
Y = A \odot B = AB + \overline{A}\,\overline{B}
$$

Four NOR gates are enough:

1. $G_1 = \overline{A+B}$
2. $G_2 = \overline{A + G_1} = \overline{A}\,(A+B) = \overline{A}B$
3. $G_3 = \overline{B + G_1} = \overline{B}\,(A+B) = A\overline{B}$
4. $Y = \overline{G_2 + G_3} = \overline{\overline{A}B + A\overline{B}} = AB + \overline{A}\,\overline{B}$

```text
A ──┬──────────────┐
    │              [NOR]── G2 ──┐
    ├──[NOR]── G1 ─┤            [NOR]── Y = A XNOR B
    │              [NOR]── G3 ──┘
B ──┴──────────────┘
```

(G1 = NOR(A,B); G2 = NOR(A,G1); G3 = NOR(B,G1); Y = NOR(G2,G3).)

| A | B | G1 | G2 | G3 | Y |
|---|---|---|---|---|---|
| 0 | 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 1 |

The output is 1 only when A = B, so the circuit is an X-NOR gate. (With NAND gates, four NANDs give X-OR and a fifth NAND used as an inverter gives X-NOR.)

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Theorem 2 states:
   A. (AB)' = A' + B'
   B. (AB)' = A'B'
   C. (A+B)' = A'+B'
   D. (AB)' = A+B
   Answer: A. Complement of product = sum of complements. (Key point: Theorem)

2. NAND equals:
   A. AND with inverted inputs
   B. OR with inverted inputs
   C. NOR
   D. XOR
   Answer: B. (AB)'=A'+B' is a bubbled OR. (Key point: Bubbled gates)

3. To prove Y = X', one shows:
   A. X = Y
   B. X+Y = 0
   C. X+Y = 1 and X.Y = 0
   D. X.Y = 1
   Answer: C. Complement conditions. (Key point: Algebraic proof)

4. XNOR with NOR uses how many gates?
   A. 5
   B. 3
   C. 2
   D. 4
   Answer: D. G1, G2, G3, Y. (Key point: NOR XNOR)

## Related in Digital Logic

- [De Morgan; NOR gate from NAND gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-importance-nor-from-nand) — Digital Logic, chapter 2
- [De Morgan's laws; XNOR using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-xnor-nor) — Digital Logic, chapter 2
- [De Morgan; positive NAND equals negative NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-positive-nand-negative-nor) — Digital Logic, chapter 2
- [Prove De Morgan's theorems; XOR using NAND](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-prove-xor-nand) — Digital Logic, chapter 2, asked 3×
- [State and prove De Morgan's laws](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-state-prove) — Digital Logic, chapter 2, asked 2×
- [De Morgan's theorem and (-47+27) by 2's complement](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-twos-complement-addition) — Digital Logic, chapter 2

## Related in other subjects

- [State and prove De Morgan's theorems](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Ade-morgan-state-prove) — Basic Electronics Engineering, chapter 6, asked 4×
- [De Morgan's theorem and duality theorem](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Ade-morgan-duality) — Basic Electronics Engineering, chapter 6
- [Why NOR and NAND are universal gates](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Auniversal-gates-nor-nand) — Basic Electronics Engineering, chapter 6
- [K-map and universal gate: xy + x'z + yz](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-universal-gate-xy) — Basic Electronics Engineering, chapter 6