---
title: "1:16 DEMUX using 1:2 DEMUXes"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:demux-1to16-from-1to2"
source: https://www.bctengineer.com/q/semester_3/digital_logic/demux-1to16-from-1to2
site: BCT Engineering
---

# 1:16 DEMUX using 1:2 DEMUXes

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2076 Chaitra, 4 marks
- Video: [1 X 8 Demultiplexer using 1X 2 Demultiplexer |  1:2 Demux to 1:8 Demux | Demultiplexer example](https://www.youtube.com/watch?v=AaHOJ7Q8SIM) — Techno Tutorials ( e-Learning)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/demux-1to16-from-1to2
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

Implement 1:16 demultiplexer using 1:2 demultiplexer.

## Short answer

A 1:16 demux is built as a tree of 15 1:2 demuxes in four levels. The first level uses S3 to split the data into two groups of 8 outputs; subsequent levels use S2, S1, S0 to further divide until 16 outputs are obtained.

## Answer

A **1:16 demultiplexer** sends one data input $D$ to one of 16 outputs chosen by 4 select lines $S_3S_2S_1S_0$. With 1:2 demultiplexers (one select line each) we build a **tree of four levels**.

**Number of 1:2 DEMUXes:** $1 + 2 + 4 + 8 = 15$.

| Level | DEMUXes | Select line | Outputs |
|---|---|---|---|
| 1 | 1 | $S_3$ (MSB) | 2 |
| 2 | 2 | $S_2$ | 4 |
| 3 | 4 | $S_1$ | 8 |
| 4 | 8 | $S_0$ (LSB) | 16 ($Y_0$–$Y_{15}$) |

```text
                         +-[1:2]-Y0,Y1
                +-[1:2]--+
                |        +-[1:2]-Y2,Y3
       +-[1:2]--+
       |        |        +-[1:2]-Y4,Y5
       |        +-[1:2]--+
       |                 +-[1:2]-Y6,Y7
D-[1:2]+
       |                 +-[1:2]-Y8,Y9
       |        +-[1:2]--+
       |        |        +-[1:2]-Y10,Y11
       +-[1:2]--+
                |        +-[1:2]-Y12,Y13
                +-[1:2]--+
                         +-[1:2]-Y14,Y15
   S3      S2       S1       S0
```

**Working:**
1. The first DEMUX sends $D$ to its upper output if $S_3 = 0$ (towards $Y_0$–$Y_7$) or lower output if $S_3 = 1$ (towards $Y_8$–$Y_{15}$).
2. Each level halves the group again using $S_2$, then $S_1$, then $S_0$.
3. All DEMUXes at one level share the same select line.

**Example:** $S_3S_2S_1S_0 = 1011$: level 1 goes to the lower half (8–15), level 2 ($S_2=0$) to 8–11, level 3 ($S_1=1$) to 10–11, level 4 ($S_0=1$) to $Y_{11}$. So $Y_{11} = D$ and all other outputs are 0.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How many 1:2 demultiplexers are needed to build a 1:16 demultiplexer?
   A. 16
   B. 15
   C. 8
   D. 31
   Answer: B. 1 + 2 + 4 + 8 = 15 across four levels. (Key point: Number of demuxes)

2. Which select line drives the first (root) level?
   A. S3, the MSB
   B. S0, the LSB
   C. S2
   D. S1
   Answer: A. The root splits 16 outputs into halves 0-7 and 8-15 using the MSB S3. (Key point: Select line order)

3. How are select lines connected to the DEMUXes in one level?
   A. Each has a different select line
   B. Only the first DEMUX in the level gets a select line
   C. All DEMUXes at one level share the same select line
   D. They use S3 on all levels
   Answer: C. One select line per level, shared by every DEMUX at that level. (Key point: Shared selects)

4. With S3S2S1S0 = 1011, which output receives D?
   A. Y13
   B. Y10
   C. Y3
   D. Y11
   Answer: D. 1011 in binary is 11, so Y11 = D and the rest are 0. (Key point: Example routing)

## Related in Digital Logic

- [1:32 DEMUX tree from 1:8 and 1:2 DEMUXes](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-1to32-tree) — Digital Logic, chapter 4
- [Multiplexer tree; 1:16 DEMUX from 1:4](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-tree-1to16-from-1to4) — Digital Logic, chapter 4
- [DEMUX vs decoder; 4×16 decoder from 2×4](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adecoder-4x16-from-2x4) — Digital Logic, chapter 4
- [Full subtractor using a 1:4 DEMUX](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Afull-subtractor-1to4-demux) — Digital Logic, chapter 4, asked 6×
- [Full adder using a single 1:4 DEMUX](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Afull-adder-1to4-demux) — Digital Logic, chapter 4, asked 5×
- [DEMUX vs decoder; seven-segment "b" segment](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-decoder-b-segment) — Digital Logic, chapter 4