---
title: "Multiplexer tree; 1:16 DEMUX from 1:4"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:demux-tree-1to16-from-1to4"
source: https://www.bctengineer.com/q/semester_3/digital_logic/demux-tree-1to16-from-1to4
site: BCT Engineering
---

# Multiplexer tree; 1:16 DEMUX from 1:4

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2081 Bhadra, 1+3 marks
- Video: [U2L5.3 | 1:16 Demultiplexer using 1:4 Demux | 1 X16 Demux Using 1 X 4 Demux |1:4 Demux to 1:16 Demux](https://www.youtube.com/watch?v=3yl02STV1H0) — Techno Tutorials ( e-Learning)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/demux-tree-1to16-from-1to4
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

What is a multiplexer tree? Construct a 1:16 demultiplexer using only 1:4 demultiplexers and logic gates if necessary.

## Short answer

A multiplexer tree builds larger MUX/DEMUX from smaller ones. A 1:16 DEMUX uses one 1:4 DEMUX with selects S3S2 to distribute data to four 1:4 DEMUXes driven by S1S0, giving 16 outputs. No extra gates needed.

## Answer

#### Multiplexer tree

A **multiplexer tree** is a larger multiplexer built by connecting smaller multiplexers in two or more levels. The lower select bits drive the first-level MUXes and the higher select bits drive the next level, which picks one first-level output. Example: a 16:1 MUX from five 4:1 MUXes. The same idea used with DEMUXes is called a **demultiplexer tree**.

#### 1:16 DEMUX from 1:4 DEMUXes

A 1:16 DEMUX needs 4 select lines $S_3 S_2 S_1 S_0$. Use five 1:4 DEMUXes in two levels:

- **Level 1:** one 1:4 DEMUX receives the data input $D$; its selects are the MSBs $S_3 S_2$. It sends $D$ to one of four lines.
- **Level 2:** four 1:4 DEMUXes, each fed from one level-1 output, all with selects $S_1 S_0$. They give the 16 outputs $Y_0$–$Y_{15}$.

```text
                          S1 S0
                        +-------+
                   +--->|  DM1  |--> Y0  .. Y3
                   |    +-------+
         S3 S2     |    +-------+
       +-------+   | +->|  DM2  |--> Y4  .. Y7
  D -->| DM0  0|---+ |  +-------+
       |      1|-----+  +-------+
       |      2|------->|  DM3  |--> Y8  .. Y11
       |      3|---+    +-------+
       +-------+   |    +-------+
                   +--->|  DM4  |--> Y12 .. Y15
                        +-------+
        (DM1-DM4 all use S1 S0)
```

**Working:** if $S_3S_2S_1S_0 = 1001$, DM0 ($S_3S_2 = 10$) sends $D$ to DM3; DM3 ($S_1S_0 = 01$) sends it to its second output, which is $Y_9$. No extra gates are needed.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is a multiplexer tree?
   A. A larger multiplexer built from smaller multiplexers in two or more levels
   B. A single multiplexer with many data lines
   C. A multiplexer with feedback
   D. A decoder with enable
   Answer: A. Lower select bits drive the first level and higher bits pick among first-level outputs; with DEMUXes it is a demultiplexer tree. (Key point: Tree definition)

2. How many 1:4 DEMUXes build a 1:16 DEMUX?
   A. 4
   B. 5
   C. 8
   D. 16
   Answer: B. One at level 1 plus four at level 2 gives five. (Key point: Number of DEMUXes)

3. With S3S2S1S0 = 1001, where does D go?
   A. Y9, via DM3's second output
   B. Y6
   C. Y12
   D. Y1
   Answer: A. S3S2 = 10 sends D to DM3 and S1S0 = 01 selects its second output, Y9. (Key point: Working)

## Related in Digital Logic

- [Multiplexer tree; 16:1 MUX from 4:1](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Amux-16to1-from-4to1) — Digital Logic, chapter 4
- [1:32 DEMUX tree from 1:8 and 1:2 DEMUXes](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-1to32-tree) — Digital Logic, chapter 4
- [DEMUX vs decoder; 4×16 decoder from 2×4](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adecoder-4x16-from-2x4) — Digital Logic, chapter 4
- [F = (A+B)(C+D)E using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Anor-only-function-realize) — Digital Logic, chapter 2
- [1:16 DEMUX using 1:2 DEMUXes](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademux-1to16-from-1to2) — Digital Logic, chapter 4
- [2-input XOR using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Axor-using-nor-only) — Digital Logic, chapter 2, asked 2×

## Related in other subjects

- [Short note: Logic gates](https://www.bctengineer.com/question.md?key=semester_1%2Fbasic_electrical_and_electronics_engineering%3Ashort-note-logic-gates) — Basic Electrical and Electronics Engineering, chapter 3
- [X-OR gate using NAND gates only](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Axor-using-nand) — Basic Electronics Engineering, chapter 6