--- title: "Sequence detector 011 using JK flip-flops" subject: "Digital Logic" chapter: 9 key: "semester_3/digital_logic:detector-011-jk" source: https://www.bctengineer.com/q/semester_3/digital_logic/detector-011-jk site: BCT Engineering --- # Sequence detector 011 using JK flip-flops Digital Logic · Chapter 9: Sequential Machines - Asked in: 2072 Chaitra, 12 marks - Video: [W11_L6: Designing sequence detector using JK-FlipFlops](https://www.youtube.com/watch?v=4_GiR4KZL74) — IIT Madras - BS in Electronic Systems - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/detector-011-jk - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-9 ## Question Design a sequential machine that has a single input 'x' and single output 'z'. The machine is required to give high output when it detects the serial sequence of 011 message. Use JK flip-flops only. ## Short answer Mealy machine with states A (reset), B (0 received), C (01 received). Using JK flip-flops, assignment A=00, B=01, C=10. Excitation equations: J1 = Q0 X, K1 = 1, J0 = X', K0 = X. Output Z = Q1 X. ## Answer A **Mealy** machine is used (output depends on present state and input), so fewer states are needed. Overlapping sequences are allowed: after a detection the machine keeps the useful tail of the input. One input X and one output Z; Z = 1 in the clock period in which the last bit of **011** arrives. Flip-flops: **J-K**. States (what has been received so far): - **A**: reset / no useful bits (a 1 that does not follow "0", or a completed 011) - **B**: "0" received - **C**: "01" received #### State diagram (Mealy) ```text Arc label = input/output A --0/0--> B --1/0--> C --1/1--> A A --1/0--> A (self loop) B --0/0--> B (self loop) C --0/0--> B ``` #### State table | Present state | Next, X=0 | Next, X=1 | Z (X=0) | Z (X=1) | |---|---|---|---|---| | A | B | A | 0 | 0 | | B | B | C | 0 | 0 | | C | B | A | 0 | 1 | #### State assignment A = 00, B = 01, C = 10 (flip-flop outputs $Q_1 Q_0$). The unused code 11 is taken as don't care (x) in all K-maps. The flip-flops are cleared to 00 at power-on (start state). Checking the final equations, from 11 the machine goes to a valid state on the next clock (X=0 goes to B, X=1 goes to A), so it is self-starting. #### Excitation table of J-K flip-flop | Q | Q+ | J | K | |---|---|---|---| | 0 | 0 | 0 | x | | 0 | 1 | 1 | x | | 1 | 0 | x | 1 | | 1 | 1 | x | 0 | #### Transition and excitation table | Q1 Q0 | X | Q1+ Q0+ | J1 | K1 | J0 | K0 | Z | |---|---|---|---|---|---|---|---| | 0 0 | 0 | 0 1 | 0 | x | 1 | x | 0 | | 0 0 | 1 | 0 0 | 0 | x | 0 | x | 0 | | 0 1 | 0 | 0 1 | 0 | x | x | 0 | 0 | | 0 1 | 1 | 1 0 | 1 | x | x | 1 | 0 | | 1 0 | 0 | 0 1 | x | 1 | 1 | x | 0 | | 1 0 | 1 | 0 0 | x | 1 | 0 | x | 1 | #### K-maps and simplified equations ```text J1 X=0 X=1 Q1Q0=00 0 0 Q1Q0=01 0 1 Q1Q0=11 x x Q1Q0=10 x x K1 X=0 X=1 Q1Q0=00 x x Q1Q0=01 x x Q1Q0=11 x x Q1Q0=10 1 1 J0 X=0 X=1 Q1Q0=00 1 0 Q1Q0=01 x x Q1Q0=11 x x Q1Q0=10 1 0 K0 X=0 X=1 Q1Q0=00 x x Q1Q0=01 0 1 Q1Q0=11 x x Q1Q0=10 x x Z X=0 X=1 Q1Q0=00 0 0 Q1Q0=01 0 0 Q1Q0=11 x x Q1Q0=10 0 1 ``` $$ \begin{aligned} J_1 &= Q_0 X \\ K_1 &= 1 \\ J_0 &= X' \\ K_0 &= X \\ Z &= Q_1 X \end{aligned} $$ #### Logic diagram ```text +-------------+ +----------+ X ------>| next-state |---->| FF1, FF0 |--+--> Q1, Q0 +----->| logic | | (CLK) | | | +-------------+ +----------+ | +-------------------<--------------------+ | +-------------+ +----->| output |----> Z X ------>| logic | +-------------+ ``` Gates needed (two J-K flip-flops with a common clock; complements are taken from the $Q'$ outputs or NOT gates): - $J_1$: a 2-input AND for $Q_0 X$. - $K_1$: tied to logic 1. - $J_0$: direct line $X'$. - $K_0$: direct line $X$. - $Z$: a 2-input AND for $Q_1 X$. **Check:** input X = 0011011 gives Z = 0001001; Z = 1 at bits 4 and 7 ("high output" when 011 ends). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What does state B mean here, and what does it do on X = 0? A. "01" received; goes to A B. "0" received; stays in B on more 0s C. Reset; goes to C D. "0" received; goes to A Answer: B. B means the last bit was 0. Further 0s still leave a 0 at the end, so the machine stays in B. (Key point: Meaning of states) 2. In which condition is Z = 1, and what is the next state? A. State B, X = 1; next state C B. State A, X = 1; next state A C. State C, X = 0; next state B D. State C, X = 1; next state A Answer: D. 01 plus 1 completes 011, so Z = Q1 X. The trailing 1 is of no use, so the next state is A. (Key point: Detection) 3. Why is K1 = 1 and J1 = Q0 X? A. Q1 is set only from B on X = 1 (reaching C), and is always cleared after leaving C B. Q1 toggles whenever X = 1 C. Q1 always follows X D. Q1 is set in state A Answer: A. Q1 = 1 only in state C, reached from B (Q0 = 1) with X = 1. From C every transition leaves C, so K1 = 1. (Key point: JK equations) 4. What happens from the unused code 11? A. The machine stays in 11 B. It goes to C C. It goes to a valid state on the next clock (B on X=0, A on X=1) D. The output Z becomes 1 permanently Answer: C. The equations send 11 to B when X = 0 and to A when X = 1, so the machine is self-starting. (Key point: Self-starting) ## Close variants set in other exams - [Sequence detector 1101 using T flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1101-t) — Digital Logic, chapter 9, asked 7× - [Sequence detector 001 using JK flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-001-jk) — Digital Logic, chapter 9, asked 7× - [Sequence detector 1110 using T flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1110-t) — Digital Logic, chapter 9, asked 7× - [Sequence detector 1101 using SR flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1101-sr) — Digital Logic, chapter 9, asked 7× - [Sequence detector 1001 using D flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1001-d) — Digital Logic, chapter 9, asked 9× ## Related in Digital Logic - [Sequence detector 011 using RS flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-011-rs) — Digital Logic, chapter 9 - [Sequence detector 110 using JK flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-110-jk) — Digital Logic, chapter 9, asked 3× - [Sequence detector 011 using T flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-011-t) — Digital Logic, chapter 9 - [Sequence detector 1011 using JK flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1011-jk) — Digital Logic, chapter 9, asked 3× - [Sequence detector 1011 using T flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-1011-t) — Digital Logic, chapter 9, asked 2× - [Sequence detector 101 using JK flip-flops](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Adetector-101-jk) — Digital Logic, chapter 9, asked 2× ## Related in other subjects - [Combinational vs sequential; JK flip-flop](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Acomb-vs-seq-jk) — Basic Electronics Engineering, chapter 6 - [Types of flip-flops; JK flip-flop](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Aflip-flop-types-jk) — Basic Electronics Engineering, chapter 6, asked 2×