---
title: "Excess-3 code and binary-to-Excess-3 converter"
subject: "Digital Logic"
chapter: 1
key: "semester_3/digital_logic:excess3-binary-converter"
source: https://www.bctengineer.com/q/semester_3/digital_logic/excess3-binary-converter
site: BCT Engineering
---

# Excess-3 code and binary-to-Excess-3 converter

Digital Logic · Chapter 1: Introduction

- Asked in: 2076 Chaitra, 2+5 marks
- Video: [BCD to Excess-3 Converter](https://www.youtube.com/watch?v=kFkpANWq90c) — Department of Electrical Engineering, IIT Jodhpur
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/excess3-binary-converter
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-1

## Question

Define excess-3 code with example. Design a binary to excess-3 code converter circuit using basic gates.

## Short answer

Excess-3 adds 3 to each decimal digit’s 4-bit binary (e.g., 5→1000). BCD-to-excess-3 converter logic: W=A+B(C+D), X=B'(C+D)+B(C+D)', Y=C⊕D, Z=D', built with NOT, AND, OR gates.

## Answer

#### Excess-3 code
**Excess-3 (XS-3)** is an unweighted BCD-type code in which each decimal digit is represented by the 4-bit binary of (digit + 3). For example, 5 → 5 + 3 = 8 → 1000, and $(27)_{10} = 0101\ 1010$.
It is **self-complementing**: the 9's complement of a digit is obtained by inverting its bits (e.g. 2 = 0101, 7 = 1010), which makes decimal subtraction easy.

#### Binary (BCD) to excess-3 converter
Assumption: input is a 4-bit binary number ABCD (A = MSB) with values 0–9; inputs 10–15 never occur and are taken as don't cares. Outputs are WXYZ = input + 3.

**Truth table**

| Dec | A B C D | W X Y Z |
|---|---|---|
| 0 | 0 0 0 0 | 0 0 1 1 |
| 1 | 0 0 0 1 | 0 1 0 0 |
| 2 | 0 0 1 0 | 0 1 0 1 |
| 3 | 0 0 1 1 | 0 1 1 0 |
| 4 | 0 1 0 0 | 0 1 1 1 |
| 5 | 0 1 0 1 | 1 0 0 0 |
| 6 | 0 1 1 0 | 1 0 0 1 |
| 7 | 0 1 1 1 | 1 0 1 0 |
| 8 | 1 0 0 0 | 1 0 1 1 |
| 9 | 1 0 0 1 | 1 1 0 0 |
| 10–15 | – | x x x x |

**Output functions**
- $W = \Sigma m(5,6,7,8,9) + d(10\text{–}15)$
- $X = \Sigma m(1,2,3,4,9) + d(10\text{–}15)$
- $Y = \Sigma m(0,3,4,7,8) + d(10\text{–}15)$
- $Z = \Sigma m(0,2,4,6,8) + d(10\text{–}15)$

**K-map for W** (rows AB, columns CD in order 00, 01, 11, 10):

```text
        CD=00 01  11  10
AB=00     0   0   0   0
AB=01     0   1   1   1
AB=11     x   x   x   x
AB=10     1   1   x   x
```
Groups: A (bottom two rows, octet), BD and BC (quads) → $W = A + BC + BD$.

Simplifying the other maps the same way:

$$
\begin{aligned} W &= A + BC + BD = A + B(C + D) \\ X &= B'C + B'D + BC'D' = B'(C+D) + B(C+D)' \\ Y &= CD + C'D' = (C \oplus D)' \\ Z &= D' \end{aligned}
$$

**Logic diagram (basic gates)**

```text
 C --+--[OR]-- (C+D) --+---[AND]-- B(C+D) --+
 D --+                 |     B --+          |--[OR]-- W
                       |                    |
                       |      A ------------+
                       |
          (C+D) --[AND]-- B'(C+D) --+
             B' --+                 |--[OR]-- X
          (C+D)'--[AND]-- B(C+D)' --+
              B --+
 C --[AND]-- CD ---+
 D --+             |--[OR]-- Y
 C'--[AND]-- C'D'--+
 D'--+
 D --[NOT]---------------- Z
```

The circuit uses NOT gates for B', C', D' and (C+D)', plus AND and OR gates as shown. Check: for input 0110 (6), W = 0 + 1·1 = 1, X = 0, Y = 0, Z = 1 → 1001 = 9 = 6 + 3.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What do the outputs WXYZ equal for input ABCD (0-9)?
   A. Input - 3
   B. Input x 3
   C. 9's complement
   D. Input + 3
   Answer: D. The circuit generates excess-3 code. (Key point: Converter function)

2. How are inputs 10-15 treated?
   A. As outputs of 0000
   B. As errors with output 1111
   C. As don't cares because they never occur in BCD
   D. They are not used and K-map is 3 variable
   Answer: C. They never occur so give simplification freedom. (Key point: Don't cares)

3. What is the simplified expression for Z (LSB)?
   A. D
   B. C xor D
   C. D'
   D. A + D
   Answer: C. Z = 1 for 0,2,4,6,8 (D = 0), so Z = D'. (Key point: Z output)

4. What is Y?
   A. C xor D
   B. (C xor D)' = CD + C'D'
   C. C + D
   D. CD'
   Answer: B. Y = 1 for 0,3,4,7,8, i.e. C = D. (Key point: Y output)

5. What is the simplified W?
   A. A + BC + BD
   B. A + B
   C. AB + CD
   D. A'B + CD
   Answer: A. The K-map groups give W = A + BC + BD. (Key point: W output)

## Close variants set in other exams

- [ASCII code and binary-to-Excess-3 converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aascii-binary-excess3-converter) — Digital Logic, chapter 1, asked 2×

## Related in Digital Logic

- [Gray code and 3-bit binary-to-Gray converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Agray-code-binary-gray-converter) — Digital Logic, chapter 1
- [BCD code and 3-bit binary-to-Gray converter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Abcd-code-gray-converter) — Digital Logic, chapter 1
- [Excess-3 code with examples](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aexcess3-code-explain) — Digital Logic, chapter 1, asked 4×

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