---
title: "Full adder from half adders"
subject: "Digital Logic"
chapter: 5
key: "semester_3/digital_logic:full-adder-half-adders"
source: https://www.bctengineer.com/q/semester_3/digital_logic/full-adder-half-adders
site: BCT Engineering
---

# Full adder from half adders

Digital Logic · Chapter 5: Arithmetic Circuits

- Asked in: 2075 Chaitra, 4 marks
- Video: [Full Adder using Half Adder](https://www.youtube.com/watch?v=Z_DYRgtAXfw) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/full-adder-half-adders
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-5

## Question

Construct Full Adder using half Adder.

## Short answer

A full adder is built with two half adders and an OR gate. First HA computes A⊕B and AB. Second HA uses that sum with Cin to produce final sum and carry Cin(A⊕B). OR combines the two carry terms: Cout = AB + Cin(A⊕B).

## Answer

A **full adder** adds three bits $A$, $B$, $C_{in}$ and gives sum $S$ and carry $C_{out}$. A **half adder** adds two bits: $S = X \oplus Y$, $C = XY$.

#### Full adder expressions

| A | B | $C_{in}$ | S | $C_{out}$ |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |

$$
S = A \oplus B \oplus C_{in}
$$
$$
\begin{aligned} C_{out} &= A'BC_{in} + AB'C_{in} + ABC_{in}' + ABC_{in} \\ &= AB + C_{in}(A'B + AB') = AB + C_{in}(A \oplus B) \end{aligned}
$$

#### Construction with two half adders and an OR gate

- **HA1** ($A$, $B$): $S_1 = A \oplus B$, $C_1 = AB$
- **HA2** ($S_1$, $C_{in}$): $S = S_1 \oplus C_{in} = A \oplus B \oplus C_{in}$, $C_2 = C_{in}(A \oplus B)$
- **OR:** $C_{out} = C_1 + C_2 = AB + C_{in}(A \oplus B)$

```text
       +-----+  S1   +-----+
A ---->| HA1 |------>| HA2 |-----------> S
B ---->|     | Cin ->|     |
       +-----+       +-----+
          | C1          | C2
          +---->[OR]<---+
                  +--------------------> Cout
```

**Check:** $A=1, B=0, C_{in}=1$: $S_1 = 1, C_1 = 0$; $S = 0, C_2 = 1$; $C_{out} = 1$. So $1+0+1 = 10_2$. Correct.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which combination of parts builds a full adder from half adders?
   A. Two half adders and an OR gate
   B. One half adder and an XOR gate
   C. Three half adders
   D. Two half adders and an AND gate
   Answer: A. HA1 adds A and B, HA2 adds that sum and Cin, and an OR gate combines the two carries. (Key point: Construction)

2. In the construction, which signal is the full adder sum S?
   A. A B + Cin
   B. The sum output of HA2, S1 XOR Cin = A XOR B XOR Cin
   C. C1 + C2
   D. The carry of HA1
   Answer: B. HA2 adds S1 = A XOR B to Cin, giving S = A XOR B XOR Cin. (Key point: Sum output)

3. Which expression gives Cout of the full adder?
   A. (A XOR B) Cin only
   B. AB Cin
   C. AB + Cin(A XOR B)
   D. A + B + Cin
   Answer: C. Cout = C1 + C2 = AB + Cin(A XOR B), the OR of the two half-adder carries. (Key point: Carry out)

4. For A = 1, B = 0, Cin = 1, what are S and Cout?
   A. S = 1, Cout = 0
   B. S = 1, Cout = 1
   C. S = 0, Cout = 0
   D. S = 0, Cout = 1
   Answer: D. S1=1, C1=0; HA2 gives S = 0 and C2 = 1; Cout = 1, so 1+0+1 = 10 in binary. (Key point: Check)

## Related in Digital Logic

- [2-bit fast adder; full subtractor from half subtractors](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Afast-adder-full-subtractor) — Digital Logic, chapter 5
- [Σ(0,2,3,5,8,12,14) using 8:1 MUX; add with full adders](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Amux-8to1-add-full-adders) — Digital Logic, chapter 4
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- [Half adder/subtractor; 1's and 2's complement subtraction](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ahalf-adder-subtractor-complement) — Digital Logic, chapter 5
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