--- title: "JK flip-flop characteristic and excitation tables" subject: "Digital Logic" chapter: 6 key: "semester_3/digital_logic:jk-flipflop-characteristic-excitation" source: https://www.bctengineer.com/q/semester_3/digital_logic/jk-flipflop-characteristic-excitation site: BCT Engineering --- # JK flip-flop characteristic and excitation tables Digital Logic · Chapter 6: Flip Flops - Asked in: 2078 Kartik, 7 marks; 2075 Chaitra, 6 marks (asked 2 times) - Video: [Truth Table, Characteristic Table and Excitation Table for JK flip flop](https://www.youtube.com/watch?v=lnQD2_M9uDI) — Neso Academy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/jk-flipflop-characteristic-excitation - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-6 ## Question Explain the operation of JK flip flop showing its logic diagram, characteristic table and then derive its characteristic equation and excitation table. ## Short answer A JK flip-flop eliminates SR's invalid state by feeding Q and Q' back to input NANDs. J,K=00 hold, 01 reset, 10 set, 11 toggle. Characteristic equation: Qn+1 = J·Qn' + K'·Qn. Excitation table: 0→0: J=0,K=X; 0→1: J=1,K=X; 1→0: J=X,K=1; 1→1: J=X,K=0. ## Answer A **JK flip-flop** is a clocked flip-flop with inputs J (like set) and K (like reset). It removes the invalid state of the SR flip-flop: when $J = K = 1$ the output **toggles**. #### Logic diagram It is an SR flip-flop with $Q$ and $Q'$ fed back to the input NAND gates. ```text J ---[NAND1]--S'-->[NAND3]---> Q CLK -[ ] Q'-->[ ] Q' --[ ] K ---[NAND2]--R'-->[NAND4]---> Q' CLK -[ ] Q--->[ ] Q --[ ] ``` NAND1 gets J, CLK and $Q'$; NAND2 gets K, CLK and $Q$; NAND3 and NAND4 form the cross-coupled latch. #### Operation (clock active) - $J = 0, K = 0$: both input NANDs give 1, latch holds: **no change**. - $J = 0, K = 1$: if $Q = 1$, NAND2 gives 0 and resets: **Q = 0**. - $J = 1, K = 0$: if $Q = 0$, NAND1 gives 0 and sets: **Q = 1**. - $J = 1, K = 1$: the gate enabled by feedback changes the state: **toggle**. #### Characteristic table | J | K | $Q_n$ | $Q_{n+1}$ | Action | |---|---|---|---|---| | 0 | 0 | 0 | 0 | No change | | 0 | 0 | 1 | 1 | No change | | 0 | 1 | 0 | 0 | Reset | | 0 | 1 | 1 | 0 | Reset | | 1 | 0 | 0 | 1 | Set | | 1 | 0 | 1 | 1 | Set | | 1 | 1 | 0 | 1 | Toggle | | 1 | 1 | 1 | 0 | Toggle | #### Characteristic equation ```text KQn=00 01 11 10 J=0 0 1 0 0 J=1 1 1 0 1 ``` - $J=1, Q_n=0$ (cells 100, 110) gives $JQ_n'$. - $K=0, Q_n=1$ (cells 001, 101) gives $K'Q_n$. $$ Q_{n+1} = J\,Q_n' + K'\,Q_n $$ #### Excitation table Shows the inputs needed for each required transition: | $Q_n$ | $Q_{n+1}$ | J | K | |---|---|---|---| | 0 | 0 | 0 | X | | 0 | 1 | 1 | X | | 1 | 0 | X | 1 | | 1 | 1 | X | 0 | For example, for $0 \to 1$ we may use $J=1, K=0$ (set) or $J=1, K=1$ (toggle), so $K$ is a don't care. **Note:** with a level-triggered JK and $J = K = 1$, the output can toggle many times while the clock is high (**race-around condition**). It is removed by using an edge-triggered or master-slave JK flip-flop. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What does a JK flip-flop do when J = K = 1 on an active clock? A. Toggles its output B. Holds its state C. Resets to 0 D. Goes to an invalid state Answer: A. This is the improvement over SR: the invalid input becomes toggle. (Key point: J=K=1 behaviour) 2. Which is the characteristic equation of the JK flip-flop? A. Qn+1 = J K' + Qn B. Qn+1 = J Qn' + K' Qn C. Qn+1 = J Qn + K' Qn' D. Qn+1 = J' Qn' + K Qn Answer: B. The K-map groups give J Qn' (set or toggle from 0) and K' Qn (hold or set from 1). (Key point: Characteristic equation) 3. For a required transition 0 to 1, what J and K are needed? A. J = X, K = 1 B. J = X, K = 0 C. J = 1, K = X D. J = 0, K = X Answer: C. J must be 1; K can be 0 (set) or 1 (toggle), so K is a don't care. (Key point: Excitation table) 4. What is the race-around condition and its remedy? A. S and R both 1; add an inverter B. With J=1,K=0 the output oscillates; remove feedback C. With J=K=0 the output flips; use a bigger clock D. With a level-triggered JK and J=K=1 the output toggles many times while the clock is high; use edge-triggered or master-slave Answer: D. Long clock level lets the feedback toggle repeatedly; edge-triggering or master-slave limits it to one change per clock. (Key point: Race-around) ## Related in Digital Logic - [SR flip-flop diagram, excitation table, equation](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Asr-flipflop-diagram-equation) — Digital Logic, chapter 6 - [JK flip-flop with tables and timing diagram](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ajk-flipflop-timing-diagram) — Digital Logic, chapter 6, asked 2× - [Edge triggered JK flip-flop with excitation table](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aedge-jk-excitation) — Digital Logic, chapter 6 - [JK flip-flop with symbol, equation, state diagram](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ajk-flipflop-state-diagram) — Digital Logic, chapter 6 - [SR flip-flop with tables, equation, timing](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Asr-flipflop-full-description) — Digital Logic, chapter 6, asked 2× - [D flip-flop with excitation table](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ad-flipflop-excitation) — Digital Logic, chapter 6 ## Related in other subjects - [JK flip-flop operation and truth table](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Ajk-flip-flop) — Basic Electronics Engineering, chapter 6 - [SR flip-flop operation](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Asr-flip-flop) — Basic Electronics Engineering, chapter 6, asked 6× - [Combinational vs sequential; JK flip-flop](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Acomb-vs-seq-jk) — Basic Electronics Engineering, chapter 6 - [Types of flip-flops; JK flip-flop](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Aflip-flop-types-jk) — Basic Electronics Engineering, chapter 6, asked 2×