--- title: "K-map Σ(0,1,4,8,10,11,12)+d, NOR" subject: "Digital Logic" chapter: 3 key: "semester_3/digital_logic:kmap-nor-gates-01248" source: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-nor-gates-01248 site: BCT Engineering --- # K-map Σ(0,1,4,8,10,11,12)+d, NOR Digital Logic · Chapter 3: Combinational Logic Circuits - Asked in: 2075 Asoj, 4+2 marks - Video: [Lec -13: 4 Variable K-Map with examples | Design K-Map | Minimization in Digital Electronics](https://www.youtube.com/watch?v=0vEvpcY8O3o) — Gate Smashers - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-nor-gates-01248 - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-3 ## Question Simplify the function using K-map F = Σ(0,1,4,8,10,11,12) and D = Σ(2,3,6,9,15). Also realize the simplified circuit using NOR Gates. ## Short answer The simplified function is F = B' + C'D'. For NOR realization, compute (C+D)' with a NOR gate, then F' = (B' + (C+D)')' using a NOR, and finally F = (F')' with a NOR inverter, using four 2-input NOR gates. ## Answer Given $F(A,B,C,D) = \Sigma m(0,1,4,8,10,11,12) + d(2,3,6,9,15)$. #### K-map simplification ```text CD AB 00 01 11 10 +---+---+---+---+ 00 | 1 | 1 | X | X | +---+---+---+---+ 01 | 1 | 0 | 0 | X | +---+---+---+---+ 11 | 1 | 0 | X | 0 | +---+---+---+---+ 10 | 1 | X | 1 | 1 | +---+---+---+---+ ``` Groups (don't-cares 2, 3, 9 complete the octet; 6 and 15 are not used): - Octet m(0,1,2,3,8,9,10,11) → $\overline{B}$ - Quad m(0,4,8,12) → $\overline{C}\,\overline{D}$ $$ F = \overline{B} + \overline{C}\,\overline{D} $$ Check: the octet covers 0, 1, 8, 10, 11 and the quad covers 0, 4, 8, 12. #### Realization using NOR gates Write the product term as a NOR: $\overline{C}\,\overline{D} = \overline{C+D}$. Then $$ \begin{aligned} F &= \overline{B} + \overline{C+D} \\ &= \overline{\overline{\overline{B} + \overline{C+D}}} \end{aligned} $$ So: $P = $ NOR($C$, $D$); $\overline{F}$ = NOR($\overline{B}$, $P$); $F$ = NOR($\overline{F}$, $\overline{F}$). ```text B ──[NOR]── B' (inputs tied) C ──┐ [NOR]── P ──┐ D ──┘ [NOR]── F' ──[NOR]── F B' ─────────────┘ (inputs tied) ``` Total: 4 two-input NOR gates. (Alternatively, the POS form $F = (\overline{B}+\overline{C})(\overline{B}+\overline{D})$ gives a NOR-NOR circuit, but it needs 6 NOR gates including inverters.) ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Which don't-cares are set to 1 to complete the octet in the K-map of F = Σ(0,1,4,8,10,11,12) + d(2,3,6,9,15)? A. 6 and 15 B. 2, 3 and 9 C. 6 and 9 D. All five don't-cares Answer: B. Octet m(0,1,2,3,8,9,10,11) needs 2, 3 and 9 as 1s; 6 and 15 are left unused. (Key point: Using don't-cares) 2. What is the minimal SOP of this function? A. B' + C'D' B. B + C'D' C. B' + CD D. A'B' + C'D' Answer: A. The octet gives B' and the quad m(0,4,8,12) gives C'D', so F = B' + C'D'. (Key point: Simplified expression) 3. How is the product term C'D' obtained using a NOR gate? A. NOR(C', D') B. NOR(C, D), because C'D' = (C+D)' C. NAND(C, D) D. OR(C, D) followed by a buffer Answer: B. By De Morgan, C'D' = (C+D)', which is a single NOR gate with inputs C and D. (Key point: NOR form of product term) 4. How many 2-input NOR gates are used in the SOP-based NOR realization of F? A. 3 B. 6 C. 4 D. 5 Answer: C. One NOR makes B', one makes P = (C+D)', one gives F' = NOR(B', P) and one inverts F' to F: 4 gates. (Key point: NOR-only circuit) ## Close variants set in other exams - [K-map Σ(1,2,3,8,9,10,11,14)+d(0,4,12), NAND](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-1238-dc-0412) — Digital Logic, chapter 3, asked 5× - [K-map Σ(1,3,7,11,15)+d, NAND](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-1371115) — Digital Logic, chapter 3, asked 5× ## Related in Digital Logic - [K-map Σ(0,1,4,8,10,11,12)+d, realize circuit](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-realize-circuit-01248) — Digital Logic, chapter 3, asked 2× - [K-map ΠM(0,2,3,8,10,11,12,15)+d, NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-maxterm-nor-0238) — Digital Logic, chapter 3 - [K-map Σm(0,1,2,4,7,8,9,10,12,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-only-01247) — Digital Logic, chapter 3 - [K-map Σm(7,9,12,13,14,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-sum-7-9-12) — Digital Logic, chapter 3 - [Minterms/maxterms; K-map Σ(1,3,5,8,10,11,12)+d](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aminterm-maxterm-kmap-1358) — Digital Logic, chapter 3, asked 2× - [K-map Σm(0,1,2,8,10,14,15)+d, POS with NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-pos-nor-0128) — Digital Logic, chapter 3 ## Related in other subjects - [K-map: x'yz + x'y'z + xyz with gates](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Akmap-xyz-realize-gates) — Basic Electronics Engineering, chapter 6, asked 2×