--- title: "K-map Σm(0,2,4,6,8,10,15)+d, NOR" subject: "Digital Logic" chapter: 3 key: "semester_3/digital_logic:kmap-nor-reduced-0246" source: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-nor-reduced-0246 site: BCT Engineering --- # K-map Σm(0,2,4,6,8,10,15)+d, NOR Digital Logic · Chapter 3: Combinational Logic Circuits - Asked in: 2070 Chaitra, 5 marks - Video: [Minimize the following expression using K map and realize using NOR gate](https://www.youtube.com/watch?v=2HpvaRRDPK8) — Maharshi Sanand Yadav T - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-nor-reduced-0246 - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-3 ## Question Use K-map method to implement the following function and also draw the reduced circuit using NOR gate. F(A,B,C,D) = Σm(0,2,4,6,8,10,15) and d = Σm(3,11,14) ## Short answer K-map simplification gives F = A' D' + B' D' + A C. For NOR-only implementation, complement A and C using NOR inverters, then three NOR gates compute (A+D)', (B+D)', and (A'+C')'; a final NOR inverts the OR of these three outputs to produce F. ## Answer Given $F(A,B,C,D) = \Sigma m(0,2,4,6,8,10,15) + d(3,11,14)$. #### K-map simplification ```text CD AB 00 01 11 10 +---+---+---+---+ 00 | 1 | 0 | X | 1 | +---+---+---+---+ 01 | 1 | 0 | 0 | 1 | +---+---+---+---+ 11 | 0 | 0 | 1 | X | +---+---+---+---+ 10 | 1 | 0 | X | 1 | +---+---+---+---+ ``` - Quad m(0,2,4,6) → $\overline{A}\,\overline{D}$ - Quad m(0,2,8,10) → $\overline{B}\,\overline{D}$ - Quad m(10,11,14,15) → $AC$ $$ F = \overline{A}\,\overline{D} + \overline{B}\,\overline{D} + AC $$ Check: 0, 2, 4, 6 by $\overline{A}\,\overline{D}$; 8, 10 by $\overline{B}\,\overline{D}$; 15 by $AC$ (using don't-cares 11 and 14). Don't-care 3 is not needed. #### Reduced circuit using NOR gates For NOR-only realization of an SOP expression, write each product term as a NOR of complemented literals (De Morgan: $\overline{X}\,\overline{Y} = \overline{X+Y}$), feed these to a NOR gate (which gives $\overline{F}$), and invert with one more NOR whose inputs are tied. $$ \begin{aligned} \overline{A}\,\overline{D} &= \overline{A+D} \\ \overline{B}\,\overline{D} &= \overline{B+D} \\ AC &= \overline{\overline{A}+\overline{C}} \\ F &= \overline{\overline{P_1+P_2+P_3}} \end{aligned} $$ ```text A ──[NOR]── A' (inputs tied) C ──[NOR]── C' (inputs tied) A, D ──[NOR]── P1 ─┐ B, D ──[NOR]── P2 ─┤──[NOR]── F' A', C' ──[NOR]── P3 ─┘ F' ──[NOR]── F (inputs tied) ``` Gates: 2 NOR inverters, 3 two-input NORs, one 3-input NOR and one NOR inverter: 7 NOR gates. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Which three groups give the minimal SOP of Σm(0,2,4,6,8,10,15) + d(3,11,14)? A. A'D', B'D' and AC B. A'B', B'D' and AC C. A'D', BD' and AC D. A'D', B'D' and CD Answer: A. Quad 0,2,4,6 = A'D'; quad 0,2,8,10 = B'D'; quad 10,11,14,15 = AC. (Key point: K-map groups) 2. How is the product A'D' implemented with a NOR gate? A. NOR(A, D) B. NOR(A', D') C. NOR(A, D') D. NAND(A, D) Answer: A. A'D' = (A+D)' by De Morgan, so NOR with inputs A and D. (Key point: Product term as NOR) 3. How is AC obtained using NOR gates? A. NOR(A, C) B. NOR(A', C') using inverted inputs C. NOR(A, C') D. OR(A, C) then NOT Answer: B. AC = (A' + C')', so feed A' and C' (from tied NOR inverters) into a NOR. (Key point: Term AC with NOR) 4. After the term NORs, how is F produced? A. A 3-input NOR gives F', then a tied-input NOR inverts it to F B. A NAND gate gives F directly C. An AND gate gives F D. The three term outputs go straight to the output Answer: A. The NOR of the three terms gives F', and a NOR with tied inputs inverts it. Total 7 NOR gates. (Key point: NOR realization steps) ## Related in Digital Logic - [K-map ΠM(0,2,3,8,10,11,12,15)+d, NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-maxterm-nor-0238) — Digital Logic, chapter 3 - [K-map Σm(0,1,2,8,10,14,15)+d, POS with NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-pos-nor-0128) — Digital Logic, chapter 3 - [K-map Σm(7,9,12,13,14,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-sum-7-9-12) — Digital Logic, chapter 3 - [K-map Σ(0,1,4,8,10,11,12)+d, NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-gates-01248) — Digital Logic, chapter 3, asked 5× - [K-map Σm(0,1,2,4,7,8,9,10,12,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-only-01247) — Digital Logic, chapter 3 - [K-map Σ(1,2,3,8,9,10,11,14)+d(0,4,12), NAND](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-1238-dc-0412) — Digital Logic, chapter 3, asked 5×