---
title: "K-map Σ(2,3,6,7,9,10,11)+d in SOP and POS"
subject: "Digital Logic"
chapter: 3
key: "semester_3/digital_logic:kmap-sop-pos-2367"
source: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-sop-pos-2367
site: BCT Engineering
---

# K-map Σ(2,3,6,7,9,10,11)+d in SOP and POS

Digital Logic · Chapter 3: Combinational Logic Circuits

- Asked in: 2076 Asoj
- Video: [Don't care conditions in Digital Electronics | SOP and POS Kmap with don't care conditions](https://www.youtube.com/watch?v=wduY7oZnF-g) — Electronics Subjectified
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/kmap-sop-pos-2367
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-3

## Question

Simplify F(A,B,C,D) = Σ(2,3,6,7,9,10,11) and d = Σ(5,8,12) using K-map. Result in SOP and POS form.

## Short answer

SOP form: F = A' C + A B' (using don't-cares 5,12,8). POS form: F = (A+C)(A'+B') (using don't-cares5,12 as 0, 8 as 1). Both expressions describe the same function with minimal two-level gate implementation.

## Answer

Given $F(A,B,C,D) = \Sigma m(2,3,6,7,9,10,11) + d(5,8,12)$.

```text
        CD
AB      00  01  11  10
      +---+---+---+---+
 00   | 0 | 0 | 1 | 1 |
      +---+---+---+---+
 01   | 0 | X | 1 | 1 |
      +---+---+---+---+
 11   | X | 0 | 0 | 0 |
      +---+---+---+---+
 10   | X | 1 | 1 | 1 |
      +---+---+---+---+
```

#### SOP form (grouping the 1s)

- Quad m(2,3,6,7) → $\overline{A}C$
- Quad m(8,9,10,11) → $A\overline{B}$

$$
F = \overline{A}C + A\overline{B}
$$

Don't-care 8 completes the $A\overline{B}$ quad; 5 and 12 are taken as 0.

#### POS form (grouping the 0s)

The 0-cells are 0, 1, 4, 13, 14, 15. Don't-cares 5 and 12 are used as 0 here (don't-care 8 is not grouped, so it stays 1):

- Quad of 0s M(0,1,4,5) → $(A+C)$
- Quad of 0s M(12,13,14,15) → $(\overline{A}+\overline{B})$

$$
F = (A+C)(\overline{A}+\overline{B})
$$

#### Check

Expanding the POS:
$$
\begin{aligned} (A+C)(\overline{A}+\overline{B}) &= A\overline{A} + A\overline{B} + \overline{A}C + \overline{B}C \\ &= A\overline{B} + \overline{A}C + \overline{B}C \\ &= A\overline{B} + \overline{A}C \end{aligned}
$$
($\overline{B}C$ is the consensus of $A\overline{B}$ and $\overline{A}C$, so it drops out.) Both forms describe exactly the same function: each sets don't-care 8 to 1 and don't-cares 5 and 12 to 0.

Each form needs only two 2-input gates plus one 2-input output gate (and inverters).

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the minimal SOP for Σm(2,3,6,7,9,10,11) + d(5,8,12)?
   A. A'C + AB'
   B. A'B + AC'
   C. A'C + B'C
   D. AB' + BC
   Answer: A. Quad m(2,3,6,7) = A'C and quad m(8,9,10,11) = AB' (using don't-care 8). (Key point: SOP result)

2. What is the POS obtained by grouping the 0s?
   A. (A + C')(A' + B)
   B. (A + C)(A' + B')
   C. (A' + C)(A + B')
   D. (A + B)(C + D)
   Answer: B. Quad M(0,1,4,5) gives (A + C) and quad M(12,13,14,15) gives (A' + B'). (Key point: POS result)

## Related in Digital Logic

- [K-map Σ(1,2,3,8,9,10,11,13,14)+d, POS](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-pos-form-12389) — Digital Logic, chapter 3
- [K-map Σ(0,1,4,8,10,11,12)+d, NAND-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-only-01248) — Digital Logic, chapter 3
- [K-map Σ(0,1,4,8,10,11,12)+d, standard minterm](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-standard-minterm-01248) — Digital Logic, chapter 3
- [SOP/POS forms and canonical form of A+BC+ABC](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Asop-pos-canonical-form) — Digital Logic, chapter 3
- [K-map Σ(1,2,3,8,9,10,11,14)+d(0,4,12), NAND](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-1238-dc-0412) — Digital Logic, chapter 3, asked 5×
- [K-map Σ(0,1,4,8,10,11,12)+d, NOR](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-gates-01248) — Digital Logic, chapter 3, asked 5×

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