--- title: "Minterms/maxterms; K-map Σm(0,1,2,4,5,9,12,15)+d, NAND" subject: "Digital Logic" chapter: 3 key: "semester_3/digital_logic:minterm-maxterm-kmap-nand-0124" source: https://www.bctengineer.com/q/semester_3/digital_logic/minterm-maxterm-kmap-nand-0124 site: BCT Engineering --- # Minterms/maxterms; K-map Σm(0,1,2,4,5,9,12,15)+d, NAND Digital Logic · Chapter 3: Combinational Logic Circuits - Asked in: 2082 Shrawan, 2+4+2 marks - Video: [Don't care conditions in Digital Electronics | SOP and POS Kmap with don't care conditions](https://www.youtube.com/watch?v=wduY7oZnF-g) — Electronics Subjectified - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/minterm-maxterm-kmap-nand-0124 - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-3 ## Question What are the minterms and the maxterms? Simplify the following logic function using K-map and implement the result using NAND gates only. Y(A,B,C,D) = Σm(0,1,2,4,5,9,12,15) + d(7,10,13) ## Short answer A minterm is an AND term with every variable (e.g., A'B'C'D'), and a maxterm is an OR term with every variable (e.g., A+B+C+D'), each corresponding to a single input combination. K-map simplification yields Y = A' B' D' + B C' + C' D + B D. NAND implementation uses NAND inverters for complements, four first-level NAND gates for the product terms, and a final NAND to produce Y. ## Answer #### Minterms and maxterms A **minterm** is a product (AND) term that contains every variable of the function exactly once, in true or complemented form. It equals 1 for exactly one input combination. A variable is written true if its value is 1 and complemented if it is 0; e.g. for ABC = 101 the minterm is $m_5 = A\overline{B}C$. A function in **canonical SOP** is a sum of minterms: $F = \Sigma m(\dots)$. A **maxterm** is a sum (OR) term that contains every variable exactly once, in true or complemented form. It equals 0 for exactly one input combination. A variable is written true if its value is 0 and complemented if it is 1; e.g. for ABC = 101 the maxterm is $M_5 = \overline{A}+B+\overline{C}$. A function in **canonical POS** is a product of maxterms: $F = \Pi M(\dots)$. $M_i = \overline{m_i}$, and a function's minterm list and maxterm list are complementary (together they hold all $2^n$ numbers). #### K-map simplification $Y(A,B,C,D) = \Sigma m(0,1,2,4,5,9,12,15) + d(7,10,13)$ ```text CD AB 00 01 11 10 +---+---+---+---+ 00 | 1 | 1 | 0 | 1 | +---+---+---+---+ 01 | 1 | 1 | X | 0 | +---+---+---+---+ 11 | 1 | X | 1 | 0 | +---+---+---+---+ 10 | 0 | 1 | 0 | X | +---+---+---+---+ ``` - Pair m(0,2) → $\overline{A}\,\overline{B}\,\overline{D}$ - Quad m(4,5,12,13) → $B\overline{C}$ - Quad m(1,5,9,13) → $\overline{C}D$ - Quad m(5,7,13,15) → $BD$ $$ Y = \overline{A}\,\overline{B}\,\overline{D} + B\overline{C} + \overline{C}D + BD $$ Check: 0, 2 by $\overline{A}\,\overline{B}\,\overline{D}$; 4, 5, 12 by $B\overline{C}$; 1, 9 by $\overline{C}D$; 15 by $BD$ (with don't-cares 7, 13). Don't-care 10 is not used. #### NAND-only implementation An SOP expression maps directly to a two-level NAND-NAND circuit (De Morgan: $X + Y = \overline{\overline{X}\cdot\overline{Y}}$). Each product term becomes a first-level NAND and the output NAND replaces the OR gate. Complemented inputs are made with NAND gates whose inputs are tied. $$ Y = \overline{\overline{\overline{A}\,\overline{B}\,\overline{D}}\cdot\overline{B\overline{C}}\cdot\overline{\overline{C}D}\cdot\overline{BD}} $$ ```text A ──[NAND]── A' (inputs tied) B ──[NAND]── B' (inputs tied) C ──[NAND]── C' (inputs tied) D ──[NAND]── D' (inputs tied) A', B', D' ──[NAND]── P1 ─┐ B, C' ──[NAND]── P2 ─┤ ├──[NAND]── Y C', D ──[NAND]── P3 ─┤ B, D ──[NAND]── P4 ─┘ ``` Gates: 4 NAND inverters, 4 first-level NANDs and one 4-input output NAND. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. For ABC = 101, which are the minterm and maxterm? A. m5 = AB'C and M5 = A' + B + C' B. m5 = A'BC' and M5 = A + B' + C C. m5 = AB'C and M5 = A + B' + C D. m5 = A' + B + C' and M5 = AB'C Answer: A. Minterm: 1 is true, 0 complemented. Maxterm: the opposite, so M5 = A' + B + C'. (Key point: Variable form in minterm vs maxterm) 2. What is the relation between maxterm and minterm of the same number? A. M_i = m_i' B. M_i = m_i C. M_i = m_(n-i) D. They are unrelated Answer: A. A maxterm is the complement of the minterm with the same number. (Key point: Relation between terms) 3. What is the minimal SOP of Y = Σm(0,1,2,4,5,9,12,15) + d(7,10,13)? A. A'B'D' + BC' + C'D + BD B. A'B'D' + B'C + CD C. BC' + BD D. A'B'D' + AB Answer: A. Terms: pair 0,2 = A'B'D'; quads 4,5,12,13 = BC'; 1,5,9,13 = C'D; 5,7,13,15 = BD. (Key point: Simplified SOP) 4. How many NAND gates does the NAND-only circuit use? A. 5 B. 9 C. 7 D. 4 Answer: B. 4 inverters + 4 first-level NANDs + 1 four-input output NAND = 9 gates. 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