---
title: "F = (A+B)(C+D)E using NOR gates only"
subject: "Digital Logic"
chapter: 2
key: "semester_3/digital_logic:nor-only-function-realize"
source: https://www.bctengineer.com/q/semester_3/digital_logic/nor-only-function-realize
site: BCT Engineering
---

# F = (A+B)(C+D)E using NOR gates only

Digital Logic · Chapter 2: Digital Logic

- Asked in: 2069 Chaitra, 4 marks
- Video: [Implementing Boolean Expressions Using NOR Gates | Logic GATEs](https://www.youtube.com/watch?v=GZ8V3M6PXkg) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/nor-only-function-realize
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-2

## Question

Construct the given Boolean function: F = (A+B)(C+D)E using NOR gates only.

## Short answer

F = ((A+B)' + (C+D)' + E')' by double inversion and De Morgan. Use two 2-input NORs for (A+B)' and (C+D)', a NOR inverter for E', and a 3-input NOR (or cascade of 2-input NORs) to combine them. Total: four NOR gates.

## Answer

$F = (A+B)(C+D)E$ is a product of sums (POS). A POS form maps directly to a NOR-NOR circuit, using double inversion and De Morgan's law.

$$
\begin{aligned} F &= (A+B)(C+D)E \\ &= \overline{\overline{(A+B)(C+D)E}} \\ &= \overline{\overline{A+B} + \overline{C+D} + \bar E} \quad (\text{De Morgan}) \end{aligned}
$$

So:
- $G_1 = \overline{A + B}$ (2-input NOR)
- $G_2 = \overline{C + D}$ (2-input NOR)
- $G_3 = \overline{E + E} = \bar E$ (NOR used as inverter)
- $F = \overline{G_1 + G_2 + G_3}$ (3-input NOR)

```text
 A --[NOR G1]--(A+B)'--+
 B --|                 |
 C --[NOR G2]--(C+D)'--+--[NOR G4]-- F
 D --|                 |   (3-input)
 E --[NOR G3]-- E' ----+
   (inputs tied)
```

**Total:** 4 NOR gates (three 2-input, one 3-input). If only 2-input NORs are allowed, G4 can be replaced by: $G_4' = \overline{G_1 + G_2}$, $G_5 = \overline{G_4' + G_4'}$ (= $G_1 + G_2$), $F = \overline{G_5 + G_3}$, giving 6 gates.

Check: A = 1, B = 0, C = 0, D = 1, E = 1 → $G_1 = 0$, $G_2 = 0$, $G_3 = 0$, F = 1; and $(1)(1)(1) = 1$.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why does F = (A+B)(C+D)E map directly to NOR gates?
   A. It is a sum of products, giving NOR-NOR
   B. It has no complemented terms
   C. It contains XOR terms
   D. It is a product of sums (POS), giving NOR-NOR
   Answer: D. POS forms map to NOR-NOR via double inversion and De Morgan. (Key point: Form to NOR)

2. What is the final output gate F?
   A. 3-input NOR of (A+B)', (C+D)', E'
   B. 2-input NOR of A+B and C+D
   C. 3-input NAND of A+B, C+D, E
   D. 3-input OR of A,B,C
   Answer: A. F = ((A+B)' + (C+D)' + E')'. (Key point: Output gate)

3. How is E' produced using NOR only?
   A. NOR of E and 0
   B. NOR with both inputs tied to E
   C. NAND of E and 1
   D. OR of E with itself
   Answer: B. (E+E)' = E', so a NOR with tied inputs is an inverter. (Key point: Handling E)

4. How many NOR gates are used if a 3-input NOR is allowed?
   A. 3
   B. 5
   C. 4
   D. 6
   Answer: C. Three first-level NORs (two 2-input, one inverter) and one 3-input NOR. (Key point: Gate count)

## Related in Digital Logic

- [2-input XOR using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Axor-using-nor-only) — Digital Logic, chapter 2, asked 2×
- [3-input XNOR using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Athree-input-xnor-nor) — Digital Logic, chapter 2
- [K-map Σm(0,1,2,4,7,8,9,10,12,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-only-01247) — Digital Logic, chapter 3
- [K-map Σm(7,9,12,13,14,15)+d, NOR-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nor-sum-7-9-12) — Digital Logic, chapter 3
- [De Morgan's laws; XNOR using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-xnor-nor) — Digital Logic, chapter 2
- [Seven-segment "a" segment using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aa-segment-nor-gates) — Digital Logic, chapter 4

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- [Why NOR and NAND are universal gates](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Auniversal-gates-nor-nand) — Basic Electronics Engineering, chapter 6
- [X-OR gate using NAND gates only](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Axor-using-nand) — Basic Electronics Engineering, chapter 6
- [T/F: tower height function of voltage only](https://www.bctengineer.com/question.md?key=semester_8%2Ftransmission_and_distribution_system_design%3Atf-tower-height-voltage-only) — Transmission and Distribution System Design, chapter 4, asked 2×
- [Spillway function, vertical and radial gates](https://www.bctengineer.com/question.md?key=semester_6%2Fhydro_power%3Aspillway-function-vertical-radial-gate) — Hydro Power, chapter 6