---
title: "RAM vs ROM; EEPROM cell"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:ram-rom-eeprom"
source: https://www.bctengineer.com/q/semester_3/digital_logic/ram-rom-eeprom
site: BCT Engineering
---

# RAM vs ROM; EEPROM cell

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2082 Shrawan, 2+3 marks
- Video: [Semiconductor Memories: ROM Explained | Types of ROM | Applications of ROM](https://www.youtube.com/watch?v=1GREaNW21XM) — ALL ABOUT ELECTRONICS
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/ram-rom-eeprom
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

Differentiate between RAM and ROM. How does an EEPROM cell work?

## Short answer

RAM is volatile read/write memory; ROM is non-volatile read-only memory. An EEPROM cell uses a floating-gate MOSFET. Programming applies high voltage to tunnel electrons onto the floating gate, raising threshold; erasing reverses voltage to remove charge. Stored charge persists without power.

## Answer

#### RAM vs ROM

| Point | RAM | ROM |
|---|---|---|
| Full form | Random Access Memory | Read Only Memory |
| Operation | Read and write | Read only (written once / rarely) |
| Volatility | Volatile: data lost on power off | Non-volatile: data kept |
| Use | Temporary data, running programs | Firmware, BIOS, look-up tables |
| Types | SRAM, DRAM | Mask ROM, PROM, EPROM, EEPROM |
| Write speed | Fast | Slow or not possible |

#### Working of an EEPROM cell

**EEPROM** (Electrically Erasable PROM) can be written and erased electrically, byte by byte, in the circuit. Each cell uses a **floating-gate MOSFET** (FLOTOX) plus a select transistor.

```text
       Control gate
     ==============
       oxide
     --------------  Floating gate (isolated)
       thin tunnel oxide (~10 nm)
  n+ Source  [ p-substrate ]  n+ Drain
```

1. **Structure:** a floating gate, fully surrounded by oxide, lies between the control gate and the channel. A small region of very thin oxide lies over the drain.
2. **Programming (write):** a high voltage (about 12–20 V) is applied to the control gate with the drain grounded. Electrons **tunnel** through the thin oxide into the floating gate (Fowler–Nordheim tunnelling). The trapped negative charge raises the transistor's threshold voltage.
3. **Erasing:** the voltage is reversed (high voltage on the drain, control gate grounded), so electrons tunnel back out of the floating gate and the threshold falls to its normal value.
4. **Reading:** a normal voltage is applied to the control gate. A charged cell does not conduct (read as 0); an uncharged cell conducts (read as 1). The charge stays for 10+ years without power, so the memory is non-volatile.

EEPROM does not need UV light (unlike EPROM), but the cell is larger and the number of write cycles is limited (about $10^5$–$10^6$).

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which statement correctly distinguishes RAM from ROM?
   A. RAM is non-volatile; ROM is volatile
   B. Both lose data on power off
   C. RAM is volatile and read/write; ROM is non-volatile and mainly read-only
   D. ROM is faster to write than RAM
   Answer: C. RAM loses its contents when power is removed, while ROM keeps its data. (Key point: RAM vs ROM)

2. What is the key element of an EEPROM cell?
   A. A fusible nichrome link
   B. A UV-transparent window over the die
   C. A flip-flop made of cross-coupled gates
   D. A floating gate isolated by oxide, with a thin tunnel oxide over the drain
   Answer: D. The FLOTOX cell stores charge on an isolated floating gate that is reached by tunnelling through thin oxide. (Key point: EEPROM cell structure)

3. How is a bit written to an EEPROM cell?
   A. A high voltage on the control gate makes electrons tunnel into the floating gate, raising the threshold voltage
   B. UV light removes electrons from the floating gate
   C. A high current blows a fuse
   D. Electrons are removed from the floating gate through the source
   Answer: A. Fowler-Nordheim tunnelling traps negative charge on the floating gate, which raises the threshold voltage. (Key point: Programming)

4. How does erasing differ from programming, and how is a cell read?
   A. Erase uses UV light; a charged cell conducts and reads 1
   B. Erase reverses the voltage so electrons leave the gate; a charged cell does not conduct and reads 0
   C. Erase blows a fuse; a charged cell reads 1
   D. Erase needs no voltage; a charged cell reads 1 only with power on
   Answer: B. Reversing the voltage lets electrons tunnel back out. In reading, a charged cell has a higher threshold and does not conduct (0). (Key point: Reading and erasing)

## Related in Digital Logic

- [RAM vs ROM; functions using PROM](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aram-rom-prom-functions) — Digital Logic, chapter 4
- [ROM and BJT memory cell storing 1 or 0](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Arom-bjt-memory-cell) — Digital Logic, chapter 4

## Related in other subjects

- [74LS138 interfacing of ROM, RAM, EPROM](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Adecoder-74ls138-rom-ram-eprom) — Microprocessor, chapter 4
- [DMA concept; ROM/RAM interface at 4000H](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Adma-memory-interface-4000h) — Instrumentation II, chapter 1
- [2G vs 3G, prioritized handoff, cell dragging](https://www.bctengineer.com/question.md?key=semester_7%2Fwireless_communication%3A2g-vs-3g-prioritized-handoff) — Wireless Communication, chapter 1
- [Count number of 1s in ROM data](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-count-ones-asm) — Embedded System, chapter 9, asked 2×