---
title: "RAM vs ROM; functions using PROM"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:ram-rom-prom-functions"
source: https://www.bctengineer.com/q/semester_3/digital_logic/ram-rom-prom-functions
site: BCT Engineering
---

# RAM vs ROM; functions using PROM

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2076 Chaitra, 2+4 marks
- Video: [PROM (Programmable Read Only Memory) || Implementing Boolean Functions using PROM || PROM Example](https://www.youtube.com/watch?v=5rcdQahTZh8) — Sudhakar Atchala
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/ram-rom-prom-functions
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

Differentiate between RAM and ROM. Implement F1 = Σ(1,2,4,6) and F2 = Σm(0,2,3) using PROM.

## Short answer

RAM is volatile and allows read/write; ROM is non-volatile and read-only. Implement F1=Σ(1,2,4,6) and F2=Σ(0,2,3) with an 8×2 PROM: a 3-to-8 decoder generates all minterms, and the OR array connects m1,m2,m4,m6 to F1 and m0,m2,m3 to F2.

## Answer

#### RAM vs ROM

| Point | RAM | ROM |
|---|---|---|
| Full form | Random Access Memory | Read Only Memory |
| Operation | Read and write | Read only (written once/rarely) |
| Volatility | Volatile: data lost on power off | Non-volatile |
| Use | Temporary data and running programs | Fixed programs (BIOS, firmware), tables |
| Types | SRAM, DRAM | Mask ROM, PROM, EPROM, EEPROM |
| Speed | Fast read and write | Fast read; writing slow or impossible |

#### F1 = Σ(1,2,4,6) and F2 = Σ(0,2,3) using PROM

Three inputs ($A$, $B$, $C$) and two outputs, so an **8 × 2 PROM** is used: a fixed 3-to-8 decoder (AND array) produces all minterms $m_0$–$m_7$, and the programmable OR array connects the needed minterms to each output.

**PROM truth table (contents):**

| Address $ABC$ | Minterm | $F_1$ | $F_2$ |
|---|---|---|---|
| 000 | $m_0$ | 0 | 1 |
| 001 | $m_1$ | 1 | 0 |
| 010 | $m_2$ | 1 | 1 |
| 011 | $m_3$ | 0 | 1 |
| 100 | $m_4$ | 1 | 0 |
| 101 | $m_5$ | 0 | 0 |
| 110 | $m_6$ | 1 | 0 |
| 111 | $m_7$ | 0 | 0 |

A 1 means the fuse/link between that minterm line and the OR gate is kept; a 0 means it is blown.

```text
A B C
| | |
[3-to-8 decoder] (fixed AND array)
 m0 m1 m2 m3 m4 m5 m6 m7
 |  x  x  |  x  |  x  |   --> OR1 --> F1
 x  |  x  x  |  |  |  |   --> OR2 --> F2
 (x = intact link)
```

- $F_1 = m_1 + m_2 + m_4 + m_6$
- $F_2 = m_0 + m_2 + m_3$

No simplification is needed with a PROM, because the decoder already gives every minterm.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which statement is correct about RAM and ROM?
   A. RAM is non-volatile; ROM is volatile
   B. RAM is volatile; ROM is non-volatile
   C. Both are volatile
   D. Both are read-only
   Answer: B. RAM loses data on power-off; ROM keeps its contents. (Key point: Volatility)

2. For F1(A,B,C) and F2(A,B,C), what PROM size is used?
   A. 8 x 2
   B. 4 x 2
   C. 8 x 3
   D. 2 x 8
   Answer: A. Three inputs give 8 addresses and there are 2 outputs. (Key point: PROM size)

3. In a PROM implementation, what is programmed?
   A. The AND array decoder
   B. The input buffers
   C. The OR array (links from minterm lines to outputs)
   D. Both arrays
   Answer: C. The decoder is a fixed AND array giving all minterms; the OR connections are programmed. (Key point: Which array is programmed)

4. Why does the PROM method need no simplification?
   A. Boolean laws are applied automatically
   B. Only don't care terms are used
   C. The functions are always single-minterm
   D. The decoder already provides every minterm
   Answer: D. All 2^n minterms are available so each function is just a sum of selected minterms. (Key point: Simplification)

## Related in Digital Logic

- [PROM vs PLA; functions using PAL](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aprom-pla-pal-functions) — Digital Logic, chapter 4
- [PLA for F1 = Σm(3,5,6,7), F2 = Σm(0,2,4,7)](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Apla-two-functions) — Digital Logic, chapter 4
- [RAM vs ROM; EEPROM cell](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aram-rom-eeprom) — Digital Logic, chapter 4
- [ROM and implementing two functions](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Arom-two-functions) — Digital Logic, chapter 4

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- [Design ROM for A,B,C to F1-F4 table](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Arom-design-abc-f1-f4) — Embedded System, chapter 4, asked 2×
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