---
title: "ROM and implementing two functions"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:rom-two-functions"
source: https://www.bctengineer.com/q/semester_3/digital_logic/rom-two-functions
site: BCT Engineering
---

# ROM and implementing two functions

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2075 Chaitra, 1+4 marks
- Video: [PROM Implementation |  (Programmable Read Only Memory) | implementing boolean function Example 2|ROM](https://www.youtube.com/watch?v=NkodtR99E-w) — Techno Tutorials ( e-Learning)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/rom-two-functions
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

What is ROM? Implement given functions F1(A,B,C) = Σ(2,3,5,6) and F2(A,B,C) = Σ(0,1,5) using ROM.

## Short answer

ROM is non-volatile memory with a fixed AND (decoder) and programmable OR array. For F1 and F2, use an 8×2 ROM: the 3-to-8 decoder generates minterms; connect m2,m3,m5,m6 to F1 and m0,m1,m5 to F2.

## Answer

**ROM (Read Only Memory)** is a non-volatile memory whose contents are fixed once programmed and can only be read in normal operation. As a logic device it is a **fixed AND array (decoder)** that generates all minterms of the address inputs, followed by a **programmable OR array**.

#### F1 = Σ(2,3,5,6), F2 = Σ(0,1,5) using ROM

Three inputs and two outputs, so an **8 × 2 ROM** (3-to-8 decoder + 2 OR gates).

| Address $ABC$ | Minterm | $F_1$ | $F_2$ |
|---|---|---|---|
| 000 | $m_0$ | 0 | 1 |
| 001 | $m_1$ | 0 | 1 |
| 010 | $m_2$ | 1 | 0 |
| 011 | $m_3$ | 1 | 0 |
| 100 | $m_4$ | 0 | 0 |
| 101 | $m_5$ | 1 | 1 |
| 110 | $m_6$ | 1 | 0 |
| 111 | $m_7$ | 0 | 0 |

$$
F_1 = m_2 + m_3 + m_5 + m_6, \qquad F_2 = m_0 + m_1 + m_5
$$

```text
 A B C
 | | |
[3-to-8 decoder]
 m0 m1 m2 m3 m4 m5 m6 m7
  .  .  x  x  .  x  x  .  --> OR1 --> F1
  x  x  .  .  .  x  .  .  --> OR2 --> F2
 (x = connection kept, . = removed)
```

When an address is applied, the decoder makes one minterm line high; each output is 1 if that line is connected to its OR gate. Example: $ABC = 101$ activates $m_5$, which is connected to both OR gates, so $F_1 = F_2 = 1$.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which describes ROM as a logic device?
   A. Fixed AND array (decoder) followed by programmable OR array
   B. Programmable AND array and fixed OR array
   C. Both arrays programmable
   D. Both arrays fixed
   Answer: A. The decoder generates all minterms; the OR connections are programmed. (Key point: ROM definition)

2. What ROM size implements F1 and F2 of three inputs?
   A. 3 x 8
   B. 8 x 2
   C. 8 x 3
   D. 2 x 8
   Answer: B. Three inputs give 8 addresses; there are two outputs. (Key point: Size)

3. Which minterm line connects to both OR gates?
   A. m2
   B. m0
   C. m5
   D. m6
   Answer: C. m5 is in F1 = Σ(2,3,5,6) and in F2 = Σ(0,1,5). (Key point: Shared minterm)

## Related in Digital Logic

- [PLA for F1 = Σm(3,5,6,7), F2 = Σm(0,2,4,7)](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Apla-two-functions) — Digital Logic, chapter 4
- [RAM vs ROM; functions using PROM](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aram-rom-prom-functions) — Digital Logic, chapter 4

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