---
title: "Short note: PLA"
subject: "Digital Logic"
chapter: 4
key: "semester_3/digital_logic:short-note-pla"
source: https://www.bctengineer.com/q/semester_3/digital_logic/short-note-pla
site: BCT Engineering
---

# Short note: PLA

Digital Logic · Chapter 4: Data Processing Circuits

- Asked in: 2076 Asoj
- Video: [Programmable Logic Array (PLA) | Easy Explanation](https://www.youtube.com/watch?v=jrQ1YYgiOTo) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/short-note-pla
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-4

## Question

Write a short note on PLA.

## Short answer

A PLA has a programmable AND array and a programmable OR array, implementing SOP functions. It shares product terms among outputs, reducing hardware compared to PROM. Design involves minimizing functions to find common product terms.

## Answer

A **PLA (Programmable Logic Array)** is a programmable logic device made of a **programmable AND array** followed by a **programmable OR array**. It implements several Boolean functions in sum-of-products (SOP) form.

**Structure** (n inputs, k product terms, m outputs):

```text
inputs --[buffers: true and complement]
            |
   [ programmable AND array ] -> P1 ... Pk
            |
   [ programmable OR array ]  -> F1 ... Fm
            |
   [ XOR / inverter (optional) ] -> outputs
```

- Each input is given in true and complemented form.
- Each AND gate forms one product term by connecting chosen literals.
- Each OR gate adds any chosen product terms. A product term can be shared by several outputs.
- Size is given as $n \times k \times m$, e.g. a 3 × 4 × 2 PLA.

**Design steps:**
1. Simplify each function to minimum SOP (try both $F$ and $F'$ to reduce product terms).
2. Find the common product terms.
3. Write the PLA programming table (inputs used, output connections, true/complement).

**Example:** $F_1 = AB' + AC$, $F_2 = AC + BC$ need only three product terms ($AB'$, $AC$, $BC$) since $AC$ is shared.

**Advantages:** both arrays programmable, so very flexible; shares product terms; uses fewer terms than a PROM for functions with many inputs.

**Disadvantages:** two programmable arrays make it slower and costlier than a PAL; harder to manufacture.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the structure of a PLA?
   A. Programmable AND array followed by programmable OR array
   B. Fixed AND followed by programmable OR
   C. Programmable AND followed by fixed OR
   D. Two fixed arrays
   Answer: A. Both planes are programmable in a PLA. (Key point: PLA structure)

2. What is a key advantage of PLA over PROM for functions with many inputs?
   A. It is faster than a PAL
   B. It shares product terms and uses fewer terms than all 2^n minterms
   C. It needs no programming
   D. It uses only one array
   Answer: B. Only needed product terms are formed, and several outputs can share them. (Key point: Product-term sharing)

3. Why is PLA slower and costlier than PAL?
   A. It has no OR gates
   B. It cannot implement SOP
   C. Two programmable arrays
   D. It needs a clock
   Answer: C. Programmable links in both planes add delay and manufacturing cost. (Key point: Disadvantage)

4. For F1 = AB' + AC and F2 = AC + BC, how many product terms does the PLA need?
   A. 4
   B. 6
   C. 2
   D. 3
   Answer: D. AB', AC, BC; AC is shared by both outputs. (Key point: Shared term example)