---
title: "Short note: ring counter"
subject: "Digital Logic"
chapter: 7
key: "semester_3/digital_logic:short-note-ring-counter"
source: https://www.bctengineer.com/q/semester_3/digital_logic/short-note-ring-counter
site: BCT Engineering
---

# Short note: ring counter

Digital Logic · Chapter 7: Registers

- Asked in: 2076 Asoj
- Video: [Ring Counter](https://www.youtube.com/watch?v=yOW-JsJL1Ks) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/short-note-ring-counter
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-7

## Question

Write a short note on ring counter.

## Short answer

A ring counter is a shift register with the last output fed back to the first input, circulating a single '1' through the stages. In a 4-bit design starting at 1000, it sequences 1000→0100→0010→0001→1000 (mod‑4). It is self-decoding and requires a preset to a valid state.

## Answer

A **ring counter** is a shift register (usually of D flip-flops) whose output of the last stage is fed back to the input of the first stage. It is initialised with a single 1 (e.g. 1000) and this 1 circulates through the flip-flops, one stage per clock.

```text
   +-----------------------------------------+
   |   PRE         CLR       CLR       CLR   |
   |  +-----+   +-----+   +-----+   +-----+  |
   +->|D  QA|-->|D  QB|-->|D  QC|-->|D  QD|--+
      |>    |   |>    |   |>    |   |>    |
      +-----+   +-----+   +-----+   +-----+
 CLK ---^---------^---------^---------^
 Start pulse: PRESET A, CLEAR B, C, D -> 1000
```

**Operation (4-bit):** after a preset/clear, QA QB QC QD = 1000. At each clock the bits shift right with $D_A = Q_D$, giving 1000, 0100, 0010, 0001 and back to 1000.

| CLK | QA | QB | QC | QD |
|---|---|---|---|---|
| 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 2 | 0 | 0 | 1 | 0 |
| 3 | 0 | 0 | 0 | 1 |
| 4 | 1 | 0 | 0 | 0 |

**Features**

- n flip-flops give **n states** (mod-n counter), e.g. 4 flip-flops give mod-4.
- Only one output is 1 at any time, so it is **self-decoding**: no decoder gates are needed.
- Each output frequency is $f_{CLK}/n$.
- It must be preset to a valid starting pattern; a wrong start (e.g. 0000 or 1100) circulates forever.
- Uses: timing/sequence generation, stepper motor control, control-step signals in CPUs.

A variation with $\overline{Q_D}$ fed back (switched tail or **Johnson counter**) gives 2n states.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How is a ring counter formed from a shift register?
   A. The last stage output is fed back to the first stage input
   B. The complement of the last stage is fed to the first stage
   C. The first stage output is fed to the last stage
   D. Every stage is clocked by the previous stage output
   Answer: A. A ring counter connects the output of the last stage back to the input of the first (D_A = QD), so the 1 circulates. (Key point: Ring counter structure)

2. Why does a ring counter need no decoder, and how many states do n flip-flops give?
   A. Only one output is 1 at a time (self-decoding); n states
   B. Its outputs are in binary code; 2^n states
   C. Only one output is 1 at a time; 2n states
   D. It uses a hidden decoder inside; n^2 states
   Answer: A. The single circulating 1 makes each output a decoded state, and n flip-flops give only n states (mod-n). (Key point: Self-decoding and states)

3. What happens if a 4-bit ring counter starts at 0000 or 1100?
   A. It automatically corrects to 1000
   B. The pattern circulates forever without becoming the correct sequence
   C. It becomes a Johnson counter
   D. It counts in binary
   Answer: B. A ring counter must be preset to a valid pattern; an invalid start just circulates forever. (Key point: Wrong start pattern)

## Related in Digital Logic

- [Shift register uses; switched tail ring counter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aswitched-tail-ring-counter) — Digital Logic, chapter 7
- [Shift register uses; 4-bit ring counter](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aring-counter-4bit) — Digital Logic, chapter 7