--- title: "Positive edge SR flip-flop and its state diagram" subject: "Digital Logic" chapter: 6 key: "semester_3/digital_logic:sr-positive-edge-state-diagram" source: https://www.bctengineer.com/q/semester_3/digital_logic/sr-positive-edge-state-diagram site: BCT Engineering --- # Positive edge SR flip-flop and its state diagram Digital Logic · Chapter 6: Flip Flops - Asked in: 2078 Bhadra, 3+2+2 marks - Video: [SR Flip Flop: Circuit, Working, Truth Table, Characteristics Table & Excitation Table](https://www.youtube.com/watch?v=ernrGU3jn6s) — Engineering Funda - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/sr-positive-edge-state-diagram - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-6 ## Question Explain the operation of positive edge trigger S-R flip-flop with excitation table. Also derive its characteristic equation and state diagram. ## Short answer A positive edge-triggered S-R flip-flop updates only at the rising clock edge. Excitation table: Q_n→Q_{n+1}: 0→0: S=0,R=X; 0→1: S=1,R=0; 1→0: S=0,R=1; 1→1: S=X,R=0. Characteristic equation: Q_{n+1}=S+R'Q_n (SR=0). State diagram: state 0 transitions to 1 on SR=10; state 1 to 0 on SR=01; other valid inputs hold. ## Answer #### Positive edge-triggered S-R flip-flop It changes state only at the **rising (LOW-to-HIGH) edge** of the clock. A pulse-transition detector (CLK ANDed with its delayed inverse) gives a very narrow pulse at each rising edge, which enables the NAND steering gates of an SR latch for a moment. S and R values at other times are ignored. Symbol: triangle at CLK (no bubble). | CLK | S | R | $Q_{n+1}$ | Action | |---|---|---|---|---| | ↑ | 0 | 0 | $Q_n$ | No change | | ↑ | 0 | 1 | 0 | Reset | | ↑ | 1 | 0 | 1 | Set | | ↑ | 1 | 1 | ? | Invalid | | 0, 1, ↓ | X | X | $Q_n$ | No change | **Excitation table** | $Q_n$ | $Q_{n+1}$ | S | R | |---|---|---|---| | 0 | 0 | 0 | X | | 0 | 1 | 1 | 0 | | 1 | 0 | 0 | 1 | | 1 | 1 | X | 0 | #### Characteristic equation ```text RQn=00 01 11 10 S=0 0 1 0 0 S=1 1 1 X X ``` $S = R = 1$ is a don't care. Grouping gives $S$ (bottom row) and $R'Q_n$ (cells 001, 101): $$ Q_{n+1} = S + R'\,Q_n, \qquad SR = 0 $$ #### State diagram Two states, Q = 0 and Q = 1; arcs labelled with SR. ```text SR=00,01 SR=00,10 +---+ SR=10 +---+ | v ----------> | v ( Q=0 ) ( Q=1 ) <---------- SR=01 ``` - In state 0: $SR = 00$ or $01$ keeps $Q = 0$; $SR = 10$ moves to state 1. - In state 1: $SR = 00$ or $10$ keeps $Q = 1$; $SR = 01$ moves to state 0. - $SR = 11$ is not allowed. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. When does a positive edge-triggered SR flip-flop change? A. While CLK = 0 B. On the falling edge C. While CLK = 1 D. On the rising (LOW-to-HIGH) edge Answer: D. A narrow pulse at the rising edge enables the steering gates for a moment. (Key point: Operation) 2. What is the characteristic equation? A. Qn+1 = S + R' Qn, SR = 0 B. Qn+1 = S R + Qn C. Qn+1 = S' R' D. Qn+1 = S' + R Qn Answer: A. With S=R=1 as don't care, the K-map gives S + R'Qn. (Key point: Characteristic equation) 3. In state Q = 1, which SR input moves the flip-flop to state 0? A. SR = 11 B. SR = 01 C. SR = 00 D. SR = 10 Answer: B. SR = 01 resets; 00 and 10 keep Q = 1. (Key point: State diagram) 4. In state Q = 0, which inputs keep Q = 0? A. SR = 10 or 11 B. SR = 01 only C. SR = 00 or 01 D. SR = 10 only Answer: C. 00 holds and 01 resets, so both leave Q = 0; 10 moves to state 1. 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