--- title: "Shift register uses; switched tail ring counter" subject: "Digital Logic" chapter: 7 key: "semester_3/digital_logic:switched-tail-ring-counter" source: https://www.bctengineer.com/q/semester_3/digital_logic/switched-tail-ring-counter site: BCT Engineering --- # Shift register uses; switched tail ring counter Digital Logic · Chapter 7: Registers - Asked in: 2078 Kartik, 2+4 marks - Video: [Johnson's Counter (Twisted/Switch Tail Ring Counter)](https://www.youtube.com/watch?v=X4mx7J1ckyU) — Neso Academy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/digital_logic/switched-tail-ring-counter - Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-7 ## Question Mention the application of shift Register. Explain the circuit diagram of 3-bit switched tail ring counter. ## Short answer Shift register applications include data storage, serial–parallel conversion, delay, and counters. A 3-bit switched tail ring counter (Johnson counter) feeds QC' back to DA, producing six states: 000, 100, 110, 111, 011, 001, then repeats. Each state is decoded with a 2-input AND gate. ## Answer #### Applications of shift registers - Temporary data storage (buffer registers). - Serial-to-parallel and parallel-to-serial conversion (UART, serial communication). - Time delay of serial data by n clock periods. - Arithmetic: shift left/right to multiply or divide by 2. - Ring counters and Johnson (twisted ring) counters, sequence generators. #### 3-bit switched tail ring counter (Johnson counter) A **switched tail (twisted ring) counter**, also called a **Johnson counter**, is a shift register whose **complemented** output of the last flip-flop is fed back to the input of the first. An n-flip-flop Johnson counter has **2n states**, so 3 flip-flops give a mod-6 counter. ```text +--------------------------------+ | QC' | | +-----+ +-----+ +------+ | +->|D QA|-->|D QB|-->|D QC| | |> | |> | |> QC'|--+ +-----+ +-----+ +------+ ^ ^ ^ CLK ----+---------+---------+ All FFs cleared to 000 at the start. ``` **Working** 1. All flip-flops are cleared: QA QB QC = 000. Then $D_A = \overline{Q_C} = 1$. 2. At each clock the data shifts right ($QB \leftarrow QA,\ QC \leftarrow QB$) and $QA \leftarrow \overline{Q_C}$. 3. 1s fill the register from the left (100, 110, 111); once QC = 1, 0s enter (011, 001, 000), and the cycle repeats after 6 clocks. | CLK | QA | QB | QC | Decoding gate | |---|---|---|---|---| | 0 | 0 | 0 | 0 | QA'.QC' | | 1 | 1 | 0 | 0 | QA.QB' | | 2 | 1 | 1 | 0 | QB.QC' | | 3 | 1 | 1 | 1 | QA.QC | | 4 | 0 | 1 | 1 | QA'.QB | | 5 | 0 | 0 | 1 | QB'.QC | | 6 | 0 | 0 | 0 | QA'.QC' | Each state is decoded by one 2-input AND gate (last column), which is simpler than decoding a binary counter. **Timing diagram** ```text 1 2 3 4 5 6 7 CLK _|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾| QA _|‾‾‾‾‾‾‾‾‾‾‾|___________|‾‾ QB _____|‾‾‾‾‾‾‾‾‾‾‾|__________ QC _________|‾‾‾‾‾‾‾‾‾‾‾|______ ``` Each output is a square wave of frequency $f_{CLK}/6$, shifted by one clock from the previous one. If the counter enters an unused state (010 or 101) it cycles in a wrong loop, so extra correction logic or a proper reset is needed. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is fed back to the first flip-flop in a switched tail (Johnson) counter? A. The true output of the last flip-flop B. The complemented output of the last flip-flop C. The output of the first flip-flop D. The clock signal Answer: B. A switched tail counter feeds the complement of the last flip-flop's output back to the first input (D_A = QC'). (Key point: Johnson feedback) 2. How many states does a 3-bit Johnson counter have? A. 3 B. 4 C. 8 D. 6 Answer: D. An n-flip-flop Johnson counter has 2n states, so 3 flip-flops give 6 states (mod-6). (Key point: Number of states) 3. Starting from 000, what is the Johnson counter sequence for QA QB QC? A. 000, 001, 010, 011, 100, 101 B. 000, 100, 010, 001, 000 C. 000, 100, 110, 111, 011, 001, 000 D. 000, 001, 011, 111, 110, 100, 000 Answer: C. With QC' = 1 entering at A, 1s fill from the left (100, 110, 111), then 0s enter (011, 001, 000). (Key point: Count sequence) 4. What happens if a 3-bit Johnson counter enters an unused state such as 010 or 101? A. It cycles in a wrong loop, so correction logic or a proper reset is needed B. It returns to 000 by itself after one clock C. It stops counting D. It becomes a binary counter Answer: A. The unused states form a separate wrong loop that never joins the main sequence, so extra logic or a reset is required. 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