---
title: "3-input XNOR using NOR gates only"
subject: "Digital Logic"
chapter: 2
key: "semester_3/digital_logic:three-input-xnor-nor"
source: https://www.bctengineer.com/q/semester_3/digital_logic/three-input-xnor-nor
site: BCT Engineering
---

# 3-input XNOR using NOR gates only

Digital Logic · Chapter 2: Digital Logic

- Asked in: 2078 Kartik, 3 marks
- Video: [NOR Gate as Universal Gate | As XOR and XNOR Gate](https://www.youtube.com/watch?v=LZf35A3NB0w) — ENGINEERING TUTORIAL
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/three-input-xnor-nor
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-2

## Question

Design three input exclusive NOR gate using NOR gates only.

## Short answer

A 3-input XNOR requires nine NOR gates. Cascade two 4-NOR XNOR blocks: first block computes P = A⊙B, second block computes Q = P⊙C = A⊕B⊕C. Finally, one NOR gate with tied inputs inverts Q to produce Y = (A⊕B⊕C)′ = A⊙B⊙C.

## Answer

A 3-input XNOR gives $Y = \overline{A \oplus B \oplus C}$. Use the 4-NOR XNOR block twice and one NOR inverter.

Since $\overline{A \oplus B} \odot C = \overline{\overline{A \oplus B} \oplus C} = A \oplus B \oplus C$, two XNOR blocks give XOR, and a final NOR inverter gives XNOR:

$$
\begin{aligned} P &= A \odot B = \overline{A \oplus B} \quad (4 \text{ NOR}) \\ Q &= P \odot C = A \oplus B \oplus C \quad (4 \text{ NOR}) \\ Y &= \overline{Q + Q} = \overline{A \oplus B \oplus C} \quad (1 \text{ NOR}) \end{aligned}
$$

Each XNOR block: $G_1 = \overline{X+Z}$, $G_2 = \overline{X+G_1}$, $G_3 = \overline{Z+G_1}$, out $= \overline{G_2+G_3}$.

```text
 A --+
     +--[XNOR: 4 NOR]-- P --+
 B --+                      +--[XNOR: 4 NOR]-- Q
                       C ---+                  |
                 Y --[NOR, inputs tied]--------+
```

Total: **9 NOR gates**.

| A | B | C | P | Q | Y |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 | 1 |
| 0 | 0 | 1 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 |
| 1 | 0 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 | 0 |

Y = 1 when an even number of inputs are 1.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which cascade builds 3-input XNOR with NOR?
   A. Three XOR blocks
   B. Two XOR then AND
   C. Two XNOR blocks then a NOR inverter
   D. One XNOR then OR
   Answer: C. Two XNORs give A xor B xor C; invert for XNOR. (Key point: Strategy)

2. Total NOR gates:
   A. 8
   B. 10
   C. 5
   D. 9
   Answer: D. 4 + 4 + 1. (Key point: Total gates)

3. Y of 3-input XNOR is 1 when:
   A. An even number of inputs are 1
   B. An odd number are 1
   C. All inputs are 1 only
   D. Any input is 1
   Answer: A. It is the complement of odd parity. (Key point: Output meaning)

## Related in Digital Logic

- [De Morgan's laws; XNOR using NOR gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-xnor-nor) — Digital Logic, chapter 2
- [2-input XOR using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Axor-using-nor-only) — Digital Logic, chapter 2, asked 2×
- [F = (A+B)(C+D)E using NOR gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Anor-only-function-realize) — Digital Logic, chapter 2
- [De Morgan; NOR gate from NAND gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-importance-nor-from-nand) — Digital Logic, chapter 2
- [2-input TTL NOR gate](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Attl-nor-2input) — Digital Logic, chapter 10
- [3-input XOR using NAND gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Athree-input-xor-nand) — Digital Logic, chapter 2, asked 2×

## Related in other subjects

- [X-OR gate using NAND gates only](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Axor-using-nand) — Basic Electronics Engineering, chapter 6
- [Why NOR and NAND are universal gates](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Auniversal-gates-nor-nand) — Basic Electronics Engineering, chapter 6
- [Spillway gates and radial gate](https://www.bctengineer.com/question.md?key=semester_6%2Fhydro_power%3Aspillway-gates-radial-gate) — Hydro Power, chapter 6
- [Best of three mutually exclusive projects, 10-year study](https://www.bctengineer.com/question.md?key=semester_6%2Fengineering_economics%3Amutually-exclusive-abc-study-10-years) — Engineering Economics, chapter 4
