---
title: "Universal gates; Ex-OR using NAND"
subject: "Digital Logic"
chapter: 2
key: "semester_3/digital_logic:universal-gates-xor-nand"
source: https://www.bctengineer.com/q/semester_3/digital_logic/universal-gates-xor-nand
site: BCT Engineering
---

# Universal gates; Ex-OR using NAND

Digital Logic · Chapter 2: Digital Logic

- Asked in: 2068 Chaitra, 2+2 marks
- Video: [Implementation of all logic gates with NAND gate | Design with universal gates | digital electronics](https://www.youtube.com/watch?v=4-kCfYGZDtE) — RF Design Basics
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/digital_logic/universal-gates-xor-nand
- Whole chapter: https://www.bctengineer.com/md/semester_3/digital_logic/chapter-2

## Question

List out the name of universal gates and why they are called universal gate? Realise Ex-OR Gate using only NAND gates.

## Short answer

NAND and NOR are universal because they can realize NOT, AND, OR. An XOR gate using only NANDs: G1 = (AB)', G2 = (A G1)', G3 = (B G1)', Y = (G2 G3)'. Four NAND gates are needed.

## Answer

#### Universal gates
The universal gates are **NAND** and **NOR**. They are called universal because any Boolean function, and every other gate (NOT, AND, OR, XOR, XNOR), can be built using only NAND gates or only NOR gates. For example, with NAND only: NOT A = $\overline{A A}$, AND = NAND followed by NOT, OR = $\overline{\bar A \bar B}$. This lets a whole circuit be made from one type of IC (e.g. 7400), which simplifies manufacture and reduces cost.

#### XOR using only NAND gates
$Y = A \oplus B = A\bar B + \bar A B$ needs **four 2-input NAND gates**.

$$
\begin{aligned} Y &= A\bar B + \bar A B \\ &= A(\bar A + \bar B) + B(\bar A + \bar B) \quad (\text{since } A\bar A = B\bar B = 0) \\ &= A\,\overline{AB} + B\,\overline{AB} \\ &= \overline{\overline{A\,\overline{AB}} \cdot \overline{B\,\overline{AB}}} \quad (\text{De Morgan}) \end{aligned}
$$

Gates: $G_1 = \overline{AB}$, $G_2 = \overline{A G_1}$, $G_3 = \overline{B G_1}$, $Y = \overline{G_2 G_3}$.

```text
 A --+---------------[NAND G2]--+
     |                 |        |
     +--[NAND G1]--G1--+        +--[NAND G4]-- Y
     |                 |        |
 B --+---------------[NAND G3]--+
```

| A | B | $G_1$ | $G_2$ | $G_3$ | Y |
|---|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 1 | 0 |
| 0 | 1 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 1 | 1 | 0 |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which gates are universal?
   A. AND and OR
   B. XOR and XNOR
   C. NOT and AND
   D. NAND and NOR
   Answer: D. NAND and NOR alone can build any function. (Key point: Universal gates)

2. Why are they called universal?
   A. Any gate or Boolean function can be built using only one of them
   B. They are the fastest gates
   C. They need no power
   D. They have only one input
   Answer: A. Each can realise NOT, AND and OR, so everything can be built. (Key point: Why universal)

3. How many 2-input NAND gates make an XOR?
   A. 2
   B. 4
   C. 3
   D. 6
   Answer: B. G1=(AB)', G2, G3 and the output NAND make four. (Key point: XOR gate count)

4. In the NAND XOR, what feeds G2 and G3?
   A. A' and B'
   B. The output Y
   C. G1 = (AB)' together with A and B respectively
   D. Only A and B
   Answer: C. G2 = (A.G1)' and G3 = (B.G1)'; Y = (G2.G3)'. (Key point: Structure)

## Related in Digital Logic

- [Why NAND and NOR are universal gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Auniversal-gates-why) — Digital Logic, chapter 2
- [XOR gate using minimum NAND gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Axor-using-nand-only) — Digital Logic, chapter 2, asked 2×
- [3-input XOR using NAND gates only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Athree-input-xor-nand) — Digital Logic, chapter 2, asked 2×
- [De Morgan; NOR gate from NAND gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Ademorgan-importance-nor-from-nand) — Digital Logic, chapter 2
- [Minterms/maxterms; K-map Σm(2,4,5,13,14)+d, universal gates](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aminterm-maxterm-kmap-universal) — Digital Logic, chapter 3
- [K-map Σ(0,1,4,8,10,11,12)+d, NAND-only](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Akmap-nand-only-01248) — Digital Logic, chapter 3

## Related in other subjects

- [X-OR gate using NAND gates only](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Axor-using-nand) — Basic Electronics Engineering, chapter 6
- [Why NOR and NAND are universal gates](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Auniversal-gates-nor-nand) — Basic Electronics Engineering, chapter 6
- [Universal motor and why so called](https://www.bctengineer.com/question.md?key=semester_4%2Felectrical_machine%3Auniversal-motor-construction-operation) — Electrical Machine, chapter 7
- [Short note: Ex-OR and Ex-NOR gate](https://www.bctengineer.com/question.md?key=semester_1%2Fbasic_electrical_and_electronics_engineering%3Ashort-note-xor-xnor) — Basic Electrical and Electronics Engineering, chapter 3