--- title: "D-MOSFET construction and working" subject: "Electronics Devices and Circuit" chapter: 3 key: "semester_3/electronics_devices_and_circuit:dmosfet-construction-working" source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/dmosfet-construction-working site: BCT Engineering --- # D-MOSFET construction and working Electronics Devices and Circuit · Chapter 3: Field-Effect Transistor - Asked in: 2080 Bhadra, 8 marks; 2079 Bhadra, 8 marks; 2076 Chaitra, 5+2+1 marks; 2076 Ashwin, 7 marks; 2074 Chaitra, 8 marks; 2073 Chaitra, 8 marks (asked 6 times) - Video: [MOSFET- Depletion Type MOSFET Explained (Construction, working and Characteristics Explained)](https://www.youtube.com/watch?v=XqGBNyhImV4) — ALL ABOUT ELECTRONICS - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/dmosfet-construction-working - Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-3 ## Question Describe the construction and working principle of DMOSFET with the help of drain characteristics curve, transfer characteristics curve and mathematical expression. ## Short answer A D-MOSFET has an n-channel diffused between n+ source and drain on a p-substrate, with insulated gate. At VGS=0, ID=IDSS. Negative VGS depletes channel, reducing ID; positive VGS enhances it, increasing ID. Saturation drain current: ID=IDSS(1−VGS/VP)². ## Answer The **depletion-type MOSFET (D-MOSFET)** has a channel already built in during manufacture, so it conducts at VGS = 0 and can be operated in both depletion and enhancement modes. #### Construction (n-channel) - A p-type substrate with two heavily doped n⁺ regions (source and drain). - A thin, lightly doped **n-type channel** is diffused between source and drain. - A thin SiO₂ layer insulates the metal gate from the channel. ```text S G D | +--||--+ | +--+---+-------+--+---+ | n+ n-channel n+ | | (built in) | | p-type substrate | +----------+----------+ B ``` #### Working principle - **VGS = 0:** with VDS applied, electrons flow from source to drain through the built-in channel; ID = IDSS. - **VGS < 0 (depletion mode):** the negative gate repels electrons from the channel, so the channel narrows (depletion), and ID falls below IDSS. At VGS = VP (pinch-off, negative), the channel is closed and ID ≈ 0. - **VGS > 0 (enhancement mode):** the positive gate attracts more electrons, widening the channel; ID rises above IDSS. - For small VDS the device acts as a voltage-controlled resistor (ohmic region); when VDS ≥ VGS - VP, the channel pinches off near the drain and ID becomes nearly constant (saturation/pinch-off region). #### Characteristics **Drain characteristics:** ```text ID | ________ VGS = +1 V (enhancement) | _/________ VGS = 0 (IDSS) | / ________ VGS = -1 V | / /________ VGS = -2 V | / / +---+--+----------- VDS ``` **Transfer characteristic:** a parabola crossing the ID axis at IDSS (VGS = 0), reaching ID = 0 at VGS = VP, and continuing to positive VGS. ```text ID | / | _.' | IDSS ---.-' | .-' | _.--' +-+---------+--------- VGS VP 0 ``` #### Mathematical expression In the saturation region, for both modes (VP ≤ VGS): ```text ID = IDSS (1 - VGS/VP)² ; VDS ≥ VGS - VP ``` For VGS > 0 the same equation holds (ID > IDSS). Transconductance: gm = (2 IDSS/|VP|)(1 - VGS/VP). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What distinguishes a D-MOSFET from an E-MOSFET? A. A channel is built in, so it conducts at VGS = 0 B. It has no oxide C. It is p-type only D. It needs VGS > Vt to conduct Answer: A. A lightly doped channel is diffused during manufacture, giving ID = IDSS at VGS = 0. (Key point: Built-in channel) 2. What happens when VGS < 0? A. The channel narrows and ID falls below IDSS B. ID rises above IDSS C. The device turns off immediately D. The oxide conducts Answer: A. The negative gate repels electrons, depleting the channel. (Key point: Depletion mode) 3. What happens when VGS > 0 in a D-MOSFET? A. ID decreases B. The channel widens and ID exceeds IDSS C. The device is destroyed D. Pinch-off occurs at VGS = 0 Answer: B. The positive gate attracts more electrons, so ID > IDSS (enhancement mode). (Key point: Enhancement mode) 4. Which equation holds in saturation for both modes? A. ID = IDSS (1 - VGS/VP)^2 B. ID = k (VGS - Vt)^2 C. ID = IDSS VGS/VP D. ID = IDSS (VP - VGS) Answer: A. The Shockley form applies for VGS ≥ VP, including positive VGS. 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