--- title: "JFET construction, curve and drain current equation" subject: "Electronics Devices and Circuit" chapter: 3 key: "semester_3/electronics_devices_and_circuit:jfet-construction-equation" source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-construction-equation site: BCT Engineering --- # JFET construction, curve and drain current equation Electronics Devices and Circuit · Chapter 3: Field-Effect Transistor - Asked in: 2082 Baisakh, 3+5 marks - Video: [Construction and Working of JFET](https://www.youtube.com/watch?v=_DZ7baOhNFQ) — Neso Academy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-construction-equation - Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-3 ## Question Explain construction and working principle of JFET with its characteristics curve and drain current equation. ## Short answer JFET has n-channel with p⁺ gates. Reverse-biased gate junctions create depletion regions that narrow the channel, controlling ID. Drain current in saturation: ID = IDSS(1 – VGS/VP)². Output characteristics show ohmic, saturation and breakdown regions. ## Answer #### Construction (n-channel JFET) A JFET has a thin bar of n-type semiconductor (the channel) with ohmic contacts at its two ends, the **source (S)** and the **drain (D)**. Heavily doped p⁺ regions are formed on both sides of the bar and joined together to form the **gate (G)**. In operation, the p–n junctions between the gate and the channel are reverse biased, so the gate takes essentially no current. ```text D | +----+-----+ | p+ n p+| G--+ channel +--G | p+ n p+| +----+-----+ | S ``` #### Working principle 1. With VGS = 0 and a small VDS, electrons flow from source to drain along the channel, and ID increases linearly with VDS (ohmic region). 2. When VGS is made negative, the gate junctions are further reverse biased and the **depletion regions widen**, narrowing the channel. The channel resistance rises and ID falls. The gate voltage therefore controls ID. 3. As VDS increases, the depletion region is widest near the drain (the reverse bias there is VDG). At VDS = VGS - VP (= VGS + |VP|), the pinch-off point, the channel almost closes near the drain and **ID becomes constant** (saturation region). 4. At VGS = VP (e.g. -4 V), the channel closes completely and ID = 0. #### Characteristic curves **Drain characteristics:** ```text ID IDSS| _________ VGS = 0 | _-'_________ VGS = -1 V | / _-'________ VGS = -2 V | / / ________ VGS = -3 V +--+----------------- VDS ohmic | saturation | breakdown ``` Regions: ohmic (small VDS), saturation (pinch-off) and breakdown (high VDS). **Transfer characteristic:** ID versus VGS is a parabola running from IDSS at VGS = 0 to ID = 0 at VGS = VP. #### Drain current equation (Shockley) In the saturation region: ```text ID = IDSS (1 - VGS/VP)² for VP ≤ VGS ≤ 0 ``` IDSS is the saturation current at VGS = 0, and VP is the pinch-off voltage (negative for an n-channel JFET). The transconductance is gm = (2 IDSS/|VP|)(1 - VGS/VP). The condition for saturation is VDS ≥ VGS - VP. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How is the gate junction biased in normal operation? A. Reverse biased B. Forward biased C. Unbiased D. Alternately both Answer: A. Reverse bias means almost zero gate current and high input resistance. (Key point: Gate bias) 2. What happens at VGS = 0 and small VDS? A. ID rises linearly with VDS B. ID is constant C. ID is zero D. ID falls Answer: A. The channel acts as a resistor in the ohmic region. (Key point: Ohmic region) 3. What does the transfer characteristic look like? A. A parabola from IDSS at VGS = 0 to zero at VGS = VP B. A straight line C. An exponential D. A rectangle Answer: A. ID = IDSS(1 - VGS/VP)^2 is parabolic. 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