--- title: "N-channel JFET construction and working" subject: "Electronics Devices and Circuit" chapter: 3 key: "semester_3/electronics_devices_and_circuit:jfet-construction-working" source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-construction-working site: BCT Engineering --- # N-channel JFET construction and working Electronics Devices and Circuit · Chapter 3: Field-Effect Transistor - Asked in: 2083 Baisakh, 7 marks; 2081 Bhadra, 1+7 marks; 2078 Bhadra, 2+6 marks; 2075 Chaitra, 7 marks; 2072 Chaitra, 6 marks; 2069 Chaitra, 6 marks; 2068 Chaitra, 2+6 marks; 2071 Shrawan, 8 marks; 2071 Chaitra, 8 marks (asked 9 times) - Video: [Construction and Working of JFET](https://www.youtube.com/watch?v=_DZ7baOhNFQ) — Neso Academy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-construction-working - Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-3 ## Question Describe the construction and working principle of N-channel JFET with the help of characteristics curve and mathematical expressions. ## Short answer An n-channel JFET has an n-type bar with p+ gate regions forming reverse-biased pn junctions. VGS controls depletion width and channel resistance. ID rises linearly with VDS then saturates at IDSS when VDS = |VP|. In saturation, ID = IDSS(1 – VGS/VP)². ## Answer A **JFET (junction field-effect transistor)** is a unipolar device in which the current flows through a channel of one doping type, controlled by the reverse bias on a gate p–n junction. #### Construction (n-channel) A bar of lightly doped n-type silicon forms the channel, with ohmic contacts at the ends: the **drain (D)** at the top and the **source (S)** at the bottom. Heavily doped p⁺ regions are diffused into both sides (and connected together) to form the **gate (G)**. The p–n junctions create depletion regions that extend into the channel. ```text D | +----+-----+ | p+ n p+| G --| channel |-- G | p+ n p+| +----+-----+ | S ``` #### Working principle 1. With VGS = 0 and a small positive VDS, electrons flow from source to drain through the channel; ID rises linearly with VDS (ohmic region), like a resistor. 2. The gate junction is reverse biased (VGS ≤ 0). A more negative VGS widens the depletion regions, **narrows the channel**, increases its resistance and reduces ID. So VGS controls ID, like a voltage-controlled resistor/current source. 3. For VGS = 0, as VDS increases, the reverse bias at the drain end is higher, so the depletion region is wider there. At **VDS = |VP|** (VP = pinch-off voltage) the channel pinches off near the drain, and ID saturates at **IDSS** (saturation current). Beyond that, ID remains almost constant (saturation/pinch-off region). 4. At VGS = VP (negative, e.g. -4 V) the channel is completely closed: ID = 0 (cut-off). 5. The gate current is almost zero (reverse-biased junction), so the input resistance is very high (10⁸ to 10¹⁰ Ω). 6. Breakdown (avalanche) occurs at large VDS, beyond the saturation region. #### Characteristics **Drain characteristics** (ID vs VDS for different VGS): ```text ID IDSS| _______ VGS = 0 | _-' | / _______ VGS = -1 V | / / |/ / _______ VGS = -2 V +--+------------ VDS ohmic| saturation (breakdown) ``` **Transfer characteristic** (ID vs VGS) is a parabola from IDSS at VGS = 0 to zero at VGS = VP. #### Drain current equation (Shockley) In the saturation region: ```text ID = IDSS (1 - VGS/VP)² for VP ≤ VGS ≤ 0 ``` where IDSS = drain current at VGS = 0 and VP = pinch-off voltage (negative for an n-channel JFET). Transconductance: gm = ∂ID/∂VGS = (2 IDSS/|VP|)(1 - VGS/VP) = gm0 (1 - VGS/VP), where gm0 = 2 IDSS/|VP|. Condition for operating in the pinch-off (saturation) region: VDS ≥ VGS - VP (= VGS + |VP|). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Why is the JFET called unipolar? A. Current is carried by only one type of carrier through the channel B. It has one terminal C. It uses one p-n junction D. It works with one polarity of VDS only Answer: A. Only majority carriers flow in the channel, unlike a BJT. (Key point: Unipolar device) 2. How does a negative VGS control ID in an n-channel JFET? A. Widens depletion regions, narrowing the channel and reducing ID B. Injects holes into the channel C. Forward biases the gate junction D. Increases channel width Answer: A. More reverse bias widens depletion regions, raising channel resistance and lowering ID. (Key point: Gate control) 3. What happens at VDS = VP with VGS = 0? A. The channel pinches off near the drain and ID saturates at IDSS B. ID becomes zero C. The gate conducts D. The channel widens Answer: A. The depletion region is widest near the drain; beyond pinch-off ID stays almost constant at IDSS. (Key point: Pinch-off) 4. What is the saturation drain current equation? A. ID = IDSS (1 - VGS/VP)^2 B. ID = IDSS (VGS - VP) C. ID = IDSS (1 - VGS/VP) D. ID = k (VGS - Vt)^2 Answer: A. Shockley's equation gives a parabola from IDSS at VGS = 0 to zero at VGS = VP. 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