---
title: "JFET Q-point (IDSS 8 mA, VP -6 V)"
subject: "Electronics Devices and Circuit"
chapter: 3
key: "semester_3/electronics_devices_and_circuit:jfet-self-bias-idss8-vp6"
source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-self-bias-idss8-vp6
site: BCT Engineering
---

# JFET Q-point (IDSS 8 mA, VP -6 V)

Electronics Devices and Circuit · Chapter 3: Field-Effect Transistor

- Asked in: 2076 Chaitra, 5 marks; 2076 Ashwin, 7 marks (asked 2 times)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/jfet-self-bias-idss8-vp6
- Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-3

## Question

Find IDQ and VGSQ from the following circuit.
[Figure: n-channel JFET with +20 V supply; 3.3 kΩ drain resistor; 1 MΩ gate resistor to ground; 1 kΩ source resistor to ground; IDSS = 8 mA, VP = -6 V]

## Short answer

VG=0, so VGS=−ID×1k. Shockley equation gives 8(1−ID/6)²=ID; solving yields IDQ=2.59 mA, VGSQ=−2.59 V.

## Answer

This is a self-bias JFET circuit: the gate is returned to ground through a 1 MΩ resistor. Since IG ≈ 0, no voltage drops across it and VG = 0.

#### Given
VDD = 20 V, RD = 3.3 kΩ, RG = 1 MΩ, RS = 1 kΩ, IDSS = 8 mA, VP = -6 V.

#### Bias line
```text
VGS = VG - ID RS = -ID RS = -(1 kΩ) ID      (ID in mA gives VGS in V)
```

#### Shockley equation
```text
ID = IDSS (1 - VGS/VP)² = 8 (1 - ID/6)²
   = 8 (1 - ID/3 + ID²/36)
   = 8 - 2.667 ID + 0.2222 ID²
0.2222 ID² - 3.667 ID + 8 = 0
ID = [3.667 ± √(13.44 - 7.111)]/0.4444 = [3.667 ± 2.516]/0.4444
ID = 13.91 mA   or   2.59 mA
```
The root 13.91 mA would give VGS = -13.9 V, which is below VP = -6 V (the JFET would be off), so it is rejected.

```text
IDQ  = 2.59 mA
VGSQ = -ID RS = -2.59 V
```
Also VDS = VDD - ID (RD + RS) = 20 - 2.59 × 4.3 = 8.87 V. Since VDS > VGS - VP = 3.41 V, the JFET is in the pinch-off (saturation) region.

**Answer: IDQ ≈ 2.59 mA, VGSQ ≈ -2.59 V.**

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is VG = 0 in this circuit?
   A. IG ≈ 0, so no drop across the 1 MΩ gate resistor
   B. The gate is connected to the source
   C. RG is zero
   D. The gate is at VDD
   Answer: A. No gate current flows, so the gate stays at ground potential. (Key point: VG)

2. What is VGS?
   A. -ID RS
   B. +ID RS
   C. -ID RD
   D. VDD - ID RS
   Answer: A. VG = 0 and VS = ID RS, so VGS = -ID RS. (Key point: Bias line)

3. Which ID is valid?
   A. 2.59 mA
   B. 13.91 mA
   C. 8 mA
   D. 3.67 mA
   Answer: A. 13.91 mA would give VGS = -13.9 V, below VP = -6 V. (Key point: Valid root)

4. How is saturation verified?
   A. VDS (8.87 V) > VGS - VP (3.41 V)
   B. VDS < VP
   C. VGS > 0
   D. ID > IDSS
   Answer: A. The JFET is in pinch-off when VDS exceeds VGS - VP. (Key point: Pinch-off check)

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