--- title: "n-channel E-MOSFET construction and working" subject: "Electronics Devices and Circuit" chapter: 3 key: "semester_3/electronics_devices_and_circuit:n-emosfet-construction-working" source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/n-emosfet-construction-working site: BCT Engineering --- # n-channel E-MOSFET construction and working Electronics Devices and Circuit · Chapter 3: Field-Effect Transistor - Asked in: 2082 Shrawan, 8 marks; 2081 Baisakh, 8 marks; 2080 Baisakh, 8 marks; 2078 Kartik, 8 marks; 2075 Ashwin, 7 marks; 2074 Ashwin, 8 marks; 2073 Shrawan, 6 marks; 2072 Kartik, 6 marks; 2070 Chaitra, 8 marks (asked 9 times) - Video: [MOSFET - Enhancement Type MOSFET Explained (Construction, Working and Characteristics Explained)](https://www.youtube.com/watch?v=l9LBIy9Ioxo) — ALL ABOUT ELECTRONICS - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/n-emosfet-construction-working - Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-3 ## Question Describe the construction and working principle of n-channel E-MOSFET with the help of necessary diagram and characteristics curve. ## Short answer An n-channel E-MOSFET has n+ source/drain in a p-substrate with an insulated gate. No channel exists at VGS=0. For VGS ≥ Vt, an n-type inversion layer forms. In triode region ID rises with VDS; in saturation ID = k(VGS – Vt)². ## Answer The **n-channel enhancement MOSFET (E-MOSFET)** has no channel when VGS = 0; the channel is created ("enhanced") by applying a positive gate voltage above the threshold voltage Vt. #### Construction - A lightly doped p-type substrate (body). - Two heavily doped n⁺ regions are diffused into it: the **source (S)** and the **drain (D)**. - A thin layer of SiO₂ insulator covers the surface between them, and a metal (or polysilicon) **gate (G)** is deposited on the oxide. No channel is built in. - The substrate is usually connected to the source. ```text S G D | +--||--+ | +--+---+-------+--+---+ | n+ | SiO2 | n+ | | | | | | p-type substrate | +----------+---------+ B ``` #### Working principle 1. **VGS = 0:** the drain-substrate and source-substrate p–n junctions are back-to-back, so no current flows even if VDS is applied (ID = 0): the device is OFF. 2. **VGS > 0 (below Vt):** the positive gate repels holes from under the oxide, forming a depletion region of negative ions; there are still no free electrons. 3. **VGS ≥ Vt:** electrons from the n⁺ regions (and the substrate) are attracted to the surface, forming an n-type **inversion layer (channel)** between source and drain. A larger VGS puts more electrons in the channel and so makes it more conductive. 4. **Small VDS (triode/ohmic region):** ID rises almost linearly with VDS, so the device acts like a voltage-controlled resistor: ID = k[2(VGS - Vt)VDS - VDS²]. 5. **Large VDS ≥ VGS - Vt:** the channel is **pinched off** at the drain end; ID saturates and depends on VGS only: ID = k (VGS - Vt)². #### Characteristics **Drain characteristics** (ID vs VDS for different VGS): ```text ID | ____ VGS = 6 V | ./____ VGS = 5 V | / ____ VGS = 4 V | / / | / /_____ VGS = 3 V +--+--+------ VDS (VGS ≤ Vt gives ID = 0) ohmic | saturation (VDS > VGS - Vt) ``` **Transfer characteristic:** ID = 0 for VGS < Vt, and a parabola ID = k (VGS - Vt)² beyond Vt. #### Features - Normally OFF, so it is used as a switch (CMOS logic) as well as an amplifier. - Very high input resistance (~10¹⁴ Ω) because of the insulated gate. - The transconductance is gm = 2k (VGS - Vt). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Why is the E-MOSFET off at VGS = 0? A. No channel exists; back-to-back p-n junctions block current B. The gate is shorted C. The oxide conducts D. The substrate is n-type Answer: A. The source-substrate and drain-substrate junctions are back to back, so no current flows. (Key point: No channel at VGS=0) 2. What forms the channel when VGS ≥ Vt? A. Holes accumulate at the surface B. An n-type inversion layer of electrons attracted under the oxide C. The oxide breaks down D. The drain doping increases Answer: B. A positive gate attracts electrons to the surface, creating an inversion layer between source and drain. (Key point: Channel formation) 3. When does the E-MOSFET saturate and what is ID? A. VDS ≥ VGS - Vt; ID = k (VGS - Vt)^2 B. VDS < VGS - Vt; ID = k VDS C. VGS < Vt; ID = IDSS D. VDS = 0; ID = k Answer: A. At VDS ≥ VGS - Vt the channel pinches off at the drain and ID depends only on VGS. (Key point: Saturation) 4. Why is the input resistance of a MOSFET so high? A. The gate is insulated by SiO2 B. The substrate is lightly doped C. The channel is thin D. The source is grounded Answer: A. The oxide layer blocks gate current, giving about 10^14 Ω. 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