---
title: "Transformer coupled class B push-pull, 25π % efficiency"
subject: "Electronics Devices and Circuit"
chapter: 4
key: "semester_3/electronics_devices_and_circuit:transformer-class-b-max-efficiency"
source: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/transformer-class-b-max-efficiency
site: BCT Engineering
---

# Transformer coupled class B push-pull, 25π % efficiency

Electronics Devices and Circuit · Chapter 4: Output Stages and Power Amplifiers

- Asked in: 2080 Bhadra, 2+2+4 marks; 2080 Baisakh, 2+4 marks; 2078 Kartik, 7 marks; 2073 Chaitra, 4+4 marks; 2071 Chaitra, 2+4 marks; 2070 Ashad, 2+4+2 marks (asked 6 times)
- Video: [Class B Power Amplifier - High Power Amplifiers - Applied Electronics](https://www.youtube.com/watch?v=T9HvHYsbC3g) — Ekeeda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_3/electronics_devices_and_circuit/transformer-class-b-max-efficiency
- Whole chapter: https://www.bctengineer.com/md/semester_3/electronics_devices_and_circuit/chapter-4

## Question

Draw the circuit diagram of transformer coupled class B push pull amplifier and its corresponding characteristics graph. And show that the maximum efficiency is 25π%.

## Short answer

Transformer-coupled class B push-pull has efficiency η = (π/4)(Vm/VCC). Maximum efficiency is 25π% (78.5%) when the peak output voltage Vm equals VCC.

## Answer

A transformer-coupled class B push-pull amplifier uses two identical transistors, each conducting for one half-cycle. The input transformer splits the signal into two halves that are 180° out of phase, and the output transformer combines the two collector currents in the load.

#### Circuit diagram
```text
                            Q1 (NPN)
                 +--------B   C-------------+
                 |            E             |
          T1     )            |             (     T2
 Vi o----(       )            |             (    )----+
         (       )-- CT ------+--- GND      (-- +VCC  |
         (       )            |             (    )   [RL]
 Vi o----(       )            |             (    )----+
                 |            E             |
                 +--------B   C-------------+
                            Q2 (NPN)
```

(T1: input transformer with a centre-tapped secondary that drives the two bases; the centre tap and both emitters go to ground. T2: output transformer with a centre-tapped primary; the ends go to the two collectors, the centre tap to +VCC, and RL is on the secondary.)

#### Characteristics (graph)
```text
  IC ^
     |  Q1 line     Q2 line
     | \   |   |   /
     |   \ |   | /
     |     \   /       dc load line is
     |      \ /        vertical at VCEQ = VCC
  0  +-------+------------> VCE
                VCC
```

Because the dc resistance of the transformer primary is small, the dc load line is almost vertical at VCE = VCC. The ac load line has slope −1/R'L through the Q point at (VCC, 0), where R'L = (N1/N2)² RL is the load seen across half of the primary (N1 = turns of half the primary).

#### Derivation of maximum efficiency
Let the peak collector current in each transistor be Im and the peak voltage across the half-primary be Vm = Im R'L.

**Output power:** Po = Im² R'L/2 = Vm²/(2R'L)

**Input power:** each transistor draws a half-sine current from VCC; the average of the two together is 2Im/π.

Pi = VCC · 2Im/π

**Efficiency:**

η = Po/Pi = (Im² R'L/2) / (2 VCC Im/π) = (π/4)(Im R'L/VCC) = (π/4)(Vm/VCC)

The maximum swing occurs when Vm = VCC (the collector voltage swings from 0 to 2VCC):

ηmax = π/4 = 0.7854 = 78.54 %

Since 25π = 78.54, this is written as **ηmax = 25π %**, the standard result for ideal class B.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is the dc load line of the transformer-coupled class B stage almost vertical at VCE = VCC?
   A. The dc resistance of the transformer primary is very small
   B. The load resistance RL is very large
   C. The transistors are biased in saturation
   D. The input transformer blocks dc
   Answer: A. The primary winding has almost zero dc resistance, so there is almost no dc voltage drop and VCEQ is about VCC whatever the current. (Key point: DC load line)

2. What is the average input power drawn from the supply by the two transistors together (peak current Im)?
   A. VCC * Im
   B. VCC * Im/2
   C. VCC * 2Im/π
   D. VCC * Im/π
   Answer: C. Each transistor draws a half-sine of average Im/π, so the pair draws 2Im/π and Pi = VCC * 2Im/π. (Key point: Input power)

3. Dividing Po = Im^2 R'L/2 by Pi = 2 VCC Im/π gives which efficiency?
   A. (π/2)(Vm/VCC)
   B. (π/4)(Vm/VCC)
   C. (4/π)(Vm/VCC)
   D. (1/2)(Vm/VCC)
   Answer: B. Po/Pi = (π/4)(Im R'L/VCC) = (π/4)(Vm/VCC), so efficiency rises in proportion to the voltage swing. (Key point: Efficiency expression)

4. When is the maximum efficiency reached, and what is its value?
   A. Vm = VCC/2, giving 50%
   B. Vm = 2VCC/π, giving 50%
   C. Vm = VCC, giving 78.54%
   D. Vm = 2VCC, giving 100%
   Answer: C. The largest swing is Vm = VCC (collector voltage swings 0 to 2VCC), giving π/4 = 78.54%. (Key point: Maximum efficiency condition)

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