--- title: "Active load doubles differential amplifier gain" subject: "Advanced Electronics" chapter: 1 key: "semester_4/advanced_electronics:active-load-gain-twice-passive" source: https://www.bctengineer.com/q/semester_4/advanced_electronics/active-load-gain-twice-passive site: BCT Engineering --- # Active load doubles differential amplifier gain Advanced Electronics · Chapter 1: Operational Amplifier Circuits - Asked in: 2072 Chaitra, 7 marks; 2071 Shrawan, 5 marks (asked 2 times) - Video: [lecture 34 MOSFET differential amplifier with active load](https://www.youtube.com/watch?v=GJ_20tqNYzA) — Sumita Gupta - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/active-load-gain-twice-passive - Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-1 ## Question Show that the voltage gain of the differential amplifier with active load is twice (higher than) that with passive load. ## Short answer With a passive load, single‑ended gain is gmRC/2. An active PNP mirror converts the signal currents of both Q1 and Q2 to the output, giving io = gmvd and Ad = gm(ro2‖ro4). For equal load resistances, gain doubles; in practice ro2‖ro4 >> RC yields far larger gain. ## Answer In an active-load differential amplifier the collector resistors RC are replaced by a PNP current mirror (Q3, Q4). We compare the single-ended output gain in both cases. ```text +VCC +VCC | | Q3 (diode)----- Q4 PNP mirror (active load) | | +-- i1 i4 --+---- Vo | | V1 --B Q1 Q2 B-- V2 | | +------+-------+ | I (tail current source) | -VEE ``` #### Passive load (RC) With a differential input vd = v1 − v2, the emitters form an ac ground and each transistor gets ±vd/2: ```text ic1 = +gm vd/2 , ic2 = -gm vd/2 Single-ended output at collector of Q2: vo = -ic2·RC = gm·RC·vd/2 Ad(passive) = gm RC / 2 ``` Only the signal current of Q2 reaches the output; the signal current of Q1 is wasted in its own RC. #### Active load (current mirror) 1. Q1 current increases by gm·vd/2. This current flows through diode-connected Q3. 2. The mirror copies it, so i4 = ic1 = +gm vd/2 flows from Q4 into the output node. 3. Q2 current decreases by gm vd/2, so Q2 draws −gm vd/2 from the output node. 4. Net current pushed into the output node: ```text io = i4 - ic2 = gm vd/2 - (-gm vd/2) = gm·vd Output node resistance = ro2 ‖ ro4 vo = gm·vd·(ro2 ‖ ro4) Ad(active) = gm (ro2 ‖ ro4) ``` #### Comparison If the load resistance is the same in both cases (ro2‖ro4 = RC), then ```text Ad(active) / Ad(passive) = gm·R / (gm·R/2) = 2 ``` So the active load **doubles** the gain because the mirror transfers the signal current of Q1 to the output and both halves contribute (full differential-to-single-ended conversion). In practice ro2‖ro4 (about 50 kΩ to 100s of kΩ) is also much larger than any practical RC, so the actual gain is many times higher, e.g. gm = 40 mS and ro2‖ro4 = 50 kΩ gives Ad = 2000. The active load also takes little dc voltage and little chip area. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is the single-ended gain of a differential pair with passive loads RC? A. gm RC B. gm (ro2 ‖ ro4) C. 2 gm RC D. gm RC / 2 Answer: D. vo = −ic2·RC = gm RC vd/2, so Ad = gm RC/2. (Key point: Passive load gain) 2. What does the PNP mirror (Q3, Q4) do with the signal current of Q1? A. Blocks it B. Wastes it in its own load C. Converts it to a voltage at Q1 D. Copies it so i4 = +gm vd/2 flows into the output node Answer: D. Q3 carries ic1 and Q4 copies it into the output, so Q1's signal current is not wasted. (Key point: Mirror action) 3. What net signal current enters the output node with an active load? A. gm vd/2 B. 0 C. gm vd/4 D. gm vd Answer: D. io = i4 − ic2 = gm vd/2 + gm vd/2 = gm vd. (Key point: Net output current) 4. With the same load resistance R, what is Ad(active)/Ad(passive)? A. 4 B. 1/2 C. 2 D. 1 Answer: C. gm R divided by gm R/2 equals 2. (Key point: Ratio) ## Related in Advanced Electronics - [Mirror error and active-load differential gain](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Amirror-error-active-load-gain) — Advanced Electronics, chapter 1 - [Short note: Differential amplifier with active load](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Ashort-note-diff-amp-active-load) — Advanced Electronics, chapter 1 - [IC biasing, Widlar advantages, differential gain](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aic-biasing-widlar-diff-gain) — Advanced Electronics, chapter 1 - [Active load preference and Widlar in IC biasing](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aactive-load-widlar-ic-biasing) — Advanced Electronics, chapter 1 - [AC analysis of differential amplifier](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adifferential-amplifier-ac-analysis) — Advanced Electronics, chapter 1 ## Related in other subjects - [Insertion gain/loss, design steps, active vs passive](https://www.bctengineer.com/question.md?key=semester_5%2Ffilter_design%3Ainsertion-loss-steps-active-passive) — Filter Design, chapter 1 - [T/F: more circuits rather than higher voltage](https://www.bctengineer.com/question.md?key=semester_8%2Ftransmission_and_distribution_system_design%3Atf-circuits-rather-than-voltage) — Transmission and Distribution System Design, chapter 2 - [Active and passive components, transconductance](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Aactive-passive-component) — Basic Electronics Engineering, chapter 1 - [Active vs passive; non-inverting (s+8)/(s+2)](https://www.bctengineer.com/question.md?key=semester_5%2Ffilter_design%3Aactive-passive-difference-noninverting) — Filter Design, chapter 6, asked 5×