---
title: "Bipolar DAC; weighted resistor DAC drawbacks"
subject: "Advanced Electronics"
chapter: 3
key: "semester_4/advanced_electronics:bipolar-dac-weighted-resistor"
source: https://www.bctengineer.com/q/semester_4/advanced_electronics/bipolar-dac-weighted-resistor
site: BCT Engineering
---

# Bipolar DAC; weighted resistor DAC drawbacks

Advanced Electronics · Chapter 3: Digital-to-Analog and Analog-to-Digital Conversion

- Asked in: 2073 Shrawan, 5+2 marks; 2071 Shrawan, 5+2 marks (asked 2 times)
- Video: [DAC-9: Monolithic DAC (Unipolar and Bipolar) and Multiplying DAC](https://www.youtube.com/watch?v=6El6TXkgWsA) — Mohit's Edu
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/bipolar-dac-weighted-resistor
- Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-3

## Question

Explain the operation of Bipolar DAC. Write disadvantages of Weighted Resistor DAC.

## Short answer

A bipolar DAC uses a unipolar R-2R DAC plus a fixed offset current equal to half full scale, shifting the output so Vo=(Rf/R)Vref(D/2^n −1/2), ranging from −FS/2 to +FS/2. Weighted-resistor DAC disadvantages: extremely wide resistor values, difficult precision and matching, switch-resistance error, poor temperature tracking, and code-dependent reference loading.

## Answer

#### Bipolar DAC
A **bipolar DAC** gives an output of both polarities (−FS/2 to +FS/2) instead of 0 to +FS. It is needed for signals such as audio and for systems that use offset-binary or 2's-complement codes.

**Method (offset binary):** a unipolar DAC is used and a fixed offset current equal to half of full scale is subtracted at the summing node, so the output is shifted down by FS/2.

```text
 -Vref -> R-2R ladder (b1..bn) --Iout--+
                                       |
 +Vref ----2R---- Ioff ----------------+
                                       |     Rf
                                       +---/\/\/--+
                                       |          |
                                       +--(-)     |
                                 GND -----(+) >---+-- Vo
```

```text
Ladder current (reference -Vref): Iout = -(Vref/R)·D/2ⁿ
Offset current: Ioff = Vref/(2R)
Vo = -Rf (Iout + Ioff)
   = (Rf/R)·Vref·(D/2ⁿ - 1/2)
```

With Rf = R, Vref = 8 V and 3 bits: Vo = 8(D/8 − 1/2) = (D − 4) V.

| Code (offset binary) | D | Vo |
|---|---|---|
| 000 | 0 | −4 V |
| 001 | 1 | −3 V |
| 011 | 3 | −1 V |
| 100 | 4 | 0 V |
| 101 | 5 | +1 V |
| 111 | 7 | +3 V |

So the MSB acts as a sign bit (1 = positive, 0 = negative). Inverting the MSB converts 2's-complement input to offset binary. The output range is −FS/2 to +FS/2 − 1 LSB.

#### Disadvantages of the weighted-resistor DAC
- **Wide range of resistor values:** R, 2R, 4R, …, 2ⁿ⁻¹R. For 12 bits the largest is 2048R, e.g. 10 kΩ to 20.48 MΩ.
- **Hard to make accurately in ICs:** very large and very small resistors, each needing a different precision, are hard to fabricate and match.
- **MSB resistor needs the highest accuracy** (tolerance better than 1/2ⁿ), which is difficult and costly.
- **Switch resistance error:** the switch on-resistance is significant compared with the small MSB resistor.
- **Poor temperature tracking** of resistors of very different values.
- Current drawn from Vref changes with the input code, loading the reference.
- So it is practical only up to about 6 to 8 bits; the R-2R ladder is preferred.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the output range of a bipolar DAC compared with a unipolar one?
   A. 0 to +FS/2
   B. 0 to -FS
   C. -FS to 0 only
   D. -FS/2 to +FS/2 instead of 0 to +FS
   Answer: D. A bipolar DAC gives both polarities, as needed for audio and signed codes. (Key point: Bipolar purpose)

2. How does the offset-binary bipolar DAC get negative outputs?
   A. A fixed offset current equal to half full scale is subtracted at the summing node
   B. The ladder is replaced by weighted resistors
   C. The reference is switched to zero
   D. The op-amp supply is reversed
   Answer: A. The offset shifts the unipolar output down by FS/2. (Key point: Offset method)

3. With Rf = R, Vref = 8 V and 3 bits, the output for code 100 is:
   A. +4 V
   B. 0 V
   C. -4 V
   D. +1 V
   Answer: B. Vo = D - 4 volts with D = 4, so Vo = 0 V; the MSB acts as a sign bit. (Key point: 3-bit example)

4. Main disadvantage of the weighted-resistor DAC?
   A. Needs only two resistor values
   B. Output is always bipolar
   C. Wide range of resistor values (R to 2^(n-1)R) hard to make accurately
   D. Constant reference current
   Answer: C. For 12 bits the largest is 2048R, and the MSB resistor needs the highest accuracy. (Key point: Weighted resistor drawback)

5. Up to roughly how many bits is a weighted-resistor DAC practical?
   A. About 16 bits
   B. About 24 bits
   C. Only 1 bit
   D. About 6 to 8 bits
   Answer: D. Because of the huge resistor spread and tolerance requirements, R-2R is preferred beyond that. (Key point: Practical limit)

## Related in Advanced Electronics

- [Bipolar DAC output for 0000, 1000, 1111](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Abipolar-dac-inputs-0000-1111) — Advanced Electronics, chapter 3
- [Current-mode R-2R preference; bipolar DAC](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Acurrent-mode-r2r-bipolar-dac) — Advanced Electronics, chapter 3
- [Bipolar DAC output and 3-bit transfer curve](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Abipolar-dac-transfer-curve) — Advanced Electronics, chapter 3
- [Design 4-bit R-2R DAC; unipolar vs bipolar](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adesign-4bit-r2r-unipolar-bipolar) — Advanced Electronics, chapter 3

## Related in other subjects

- [R-2R ladder DAC versus weighted resistor](https://www.bctengineer.com/question.md?key=semester_4%2Finstrumentation_i%3Ar-2r-ladder-dac) — Instrumentation I, chapter 5
- [SR drawbacks; D flip-flop operation](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Asr-drawback-d-flipflop) — Digital Logic, chapter 6
- [Positive edge JK flip-flop and its drawbacks](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Apositive-edge-jk-drawbacks) — Digital Logic, chapter 6
