---
title: "Dual slope ADC numerical (12 kHz clock)"
subject: "Advanced Electronics"
chapter: 3
key: "semester_4/advanced_electronics:dual-slope-numerical-12khz"
source: https://www.bctengineer.com/q/semester_4/advanced_electronics/dual-slope-numerical-12khz
site: BCT Engineering
---

# Dual slope ADC numerical (12 kHz clock)

Advanced Electronics · Chapter 3: Digital-to-Analog and Analog-to-Digital Conversion

- Asked in: 2074 Asoj, 2+2+3 marks
- Video: [Dual Slope ADC: Basics, Structure, Working, Output, and Conversion Time](https://www.youtube.com/watch?v=wkQPFUHrrWA) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/dual-slope-numerical-12khz
- Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-3

## Question

A dual slope integrator with a clock frequency of 12KHZ, Vref = 100mv with 1000 clock pulses set for T1. Find out the digital counter output if analog input equals 100mv. Find the conversion time.

## Short answer

Using N2 = N1·( Vin/ Vref) gives 1000 counts. With clock period 83.33 µs, T1 = T2 = 83.33 ms, so conversion time = 166.67 ms.

## Answer

In a dual slope ADC the input is integrated for a fixed time T1 (fixed number of clock pulses N1), then the reference is integrated back to zero. The count N2 taken in the de-integration time T2 is the digital output.

#### Given
- Clock frequency f = 12 kHz, so clock period T = 1/f = 1/12000 = 83.33 µs
- Fixed count for T1: N1 = 1000 pulses
- Vref = 100 mV, Vin = 100 mV

#### Basic relation
During T1 the integrator output reaches Vin·T1/RC. During T2 it falls back to zero at slope Vref/RC. Equating:

```text
Vin·T1 / RC = Vref·T2 / RC
T2 = T1 · (Vin / Vref)
N2 = N1 · (Vin / Vref)
```

The RC value cancels, so it is not needed.

#### Digital counter output
```text
N2 = 1000 × (100 mV / 100 mV)
   = 1000 counts
```

The counter shows **1000** (when Vin = Vref the de-integration takes exactly as many counts as the integration).

#### Conversion time
```text
T1 = N1 × T = 1000 × 83.33 µs = 83.33 ms
T2 = N2 × T = 1000 × 83.33 µs = 83.33 ms
Tc = T1 + T2 = 83.33 + 83.33 = 166.67 ms
```

**Answer:** digital output = 1000 counts; T1 = T2 = 83.33 ms; conversion time ≈ **166.67 ms**.

Note: this is also the maximum conversion time, because Vin = Vref is the full-scale input. A smaller input gives a shorter T2, while T1 stays fixed at 83.33 ms.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. For a dual slope ADC, N2 equals:
   A. N1 x Vin/Vref
   B. N1 x Vref/Vin
   C. N1 x Vin x RC
   D. N1 + Vin/Vref
   Answer: A. From Vin T1 = Vref T2, RC and clock cancel. (Key point: Count relation)

2. With N1 = 1000, Vin = Vref = 100 mV, the count is:
   A. 100
   B. 1000
   C. 500
   D. 2000
   Answer: B. N2 = 1000 x 100/100 = 1000. (Key point: Digital output)

3. The clock period for 12 kHz is about:
   A. 8.33 µs
   B. 833.3 µs
   C. 83.33 µs
   D. 120 µs
   Answer: C. T = 1/12000 s = 83.33 µs. (Key point: Clock period)

4. The conversion time T1 + T2 here is:
   A. About 83.33 ms
   B. About 1.67 ms
   C. About 333 ms
   D. About 166.67 ms
   Answer: D. T1 = T2 = 1000 x 83.33 µs = 83.33 ms, sum 166.67 ms (also the maximum). (Key point: Conversion time)

## Related in Advanced Electronics

- [Sigma-delta applications; 8-bit dual slope numerical](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Asigma-delta-dual-slope-numerical) — Advanced Electronics, chapter 3
- [Counter-type ADC numerical (VFS = 12 V)](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Acounter-adc-12v-numerical) — Advanced Electronics, chapter 3
- [Dual slope ADC working; why accurate](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-adc-accurate) — Advanced Electronics, chapter 3, asked 3×
- [Dual slope ADC: RC independence, noise immunity](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-rc-noise-immune) — Advanced Electronics, chapter 3
- [Dual slope ADC; why quad slope is more accurate](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-quad-slope) — Advanced Electronics, chapter 3
- [Dual slope ADC block diagram; integral linearity](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-integral-linearity) — Advanced Electronics, chapter 3

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