--- title: "IC biasing, Widlar advantages, differential gain" subject: "Advanced Electronics" chapter: 1 key: "semester_4/advanced_electronics:ic-biasing-widlar-diff-gain" source: https://www.bctengineer.com/q/semester_4/advanced_electronics/ic-biasing-widlar-diff-gain site: BCT Engineering --- # IC biasing, Widlar advantages, differential gain Advanced Electronics · Chapter 1: Operational Amplifier Circuits - Asked in: 2070 Asar, 2+1+4 marks - Video: [BJT Widlar Current Mirror](https://www.youtube.com/watch?v=STOZkTMscbk) — Mateo Aboy - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/ic-biasing-widlar-diff-gain - Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-1 ## Question What is the principle of biasing the circuit in IC design? Write the advantages of Widlar current source. Derive the differential mode voltage gain for BJT differential amplifier. ## Short answer IC biasing uses current mirrors to avoid large resistors; one reference current is copied to all stages. Widlar advantages: small currents with small resistors, high Ro, low sensitivity. For differential input ±vd/2, the emitter is ac ground; double-ended gain is Ad = gm·RC, single-ended is gm·RC/2. ## Answer #### Principle of biasing in IC design - Large resistors and capacitors are costly in chip area, but transistors are cheap and well matched. - So stages are direct coupled and biased with **constant current sources (current mirrors)** instead of resistor networks. - A single reference current is set by one resistor and copied to all stages (current steering); scaled emitter areas or Widlar sources give other current values. #### Advantages of the Widlar current source - Small currents (µA) with small resistors, so less chip area. - High output resistance, Ro ≈ ro(1 + gm RE). - Lower sensitivity of IO to VCC, β and temperature. #### Differential-mode voltage gain of BJT differential amplifier ```text +VCC +VCC | | RC RC +-- vo1 vo2 --+ | | v1 ---B Q1 Q2 B--- v2 | | +-------+-------+ | E RE (tail) | -VEE ``` Apply a pure differential input: v1 = +vd/2, v2 = −vd/2. The emitter currents of Q1 and Q2 change by equal and opposite amounts, so the current in RE does not change and the common emitter point is at **ac ground**. Each half is then a common-emitter amplifier: ```text Half circuit: input vd/2, load RC, emitter grounded ic1 = gm·(vd/2), ic2 = -gm·(vd/2) vo1 = -gm·RC·vd/2 vo2 = +gm·RC·vd/2 ``` Gains (with gm = IC/VT = (IEE/2)/VT): ```text Double-ended output: vod = vo2 - vo1 = gm·RC·vd Ad = vod/vd = gm·RC = β·RC/rπ Single-ended output: Ad = vo2/vd = gm·RC/2 ``` If an unbypassed resistor RE' is added in each emitter, the double-ended gain becomes Ad ≈ RC/(re + RE'), where re = 1/gm ≈ VT/IE. The differential input resistance is 2rπ (or about 2(β + 1)(re + RE') with the emitter resistors). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is the principle of biasing in IC design? A. Use large inductors B. Use batteries per stage C. Use resistor divider and coupling capacitors D. Use constant current sources (mirrors) and direct coupling Answer: D. Resistors and capacitors cost area while transistors are cheap and matched, so mirrors bias the stages. (Key point: Principle) 2. Why is the common emitter point at ac ground for pure differential input? A. IE1 and IE2 change equally and oppositely so the current in RE is constant B. β is infinite C. The supply is shorted D. RE is zero Answer: A. With ±vd/2 the changes cancel, so no signal voltage appears at the emitters. (Key point: AC ground) 3. What is the double-ended differential gain? A. gm RC / 2 B. β RE C. gm RC D. RC / RE Answer: C. vod = vo2 − vo1 = gm RC vd, so Ad = gm RC. (Key point: Gain) 4. What is the differential input resistance? A. rπ/2 B. rπ C. 2rπ D. β RE Answer: C. The differential input sees two rπ in series: Rid = 2rπ. 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