--- title: "Offset voltage/current and bias current compensation" subject: "Advanced Electronics" chapter: 2 key: "semester_4/advanced_electronics:offset-voltage-bias-compensation" source: https://www.bctengineer.com/q/semester_4/advanced_electronics/offset-voltage-bias-compensation site: BCT Engineering --- # Offset voltage/current and bias current compensation Advanced Electronics · Chapter 2: Operational Amplifier Characterization - Asked in: 2073 Chaitra, 2+5 marks; 2069 Asar, 2+5 marks (asked 2 times) - Video: [Op-Amp: Input Bias Current and Input Offset Current Explained](https://www.youtube.com/watch?v=c3X7_ohCTSw) — ALL ABOUT ELECTRONICS - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/offset-voltage-bias-compensation - Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-2 ## Question What are input offset voltage and input offset currents of an operational amplifier? How can the effect of input bias currents be compensated (reduced) in operational amplifier? ## Short answer Input offset voltage is the differential input needed to zero the output; input offset current is the difference between bias currents. To compensate bias currents, place Rcomp = R1‖Rf at the non‑inverting input, so both inputs see equal resistance, reducing output error to Ios·Rf. ## Answer #### Input offset voltage **Input offset voltage (Vio)** is the dc differential voltage that must be applied between the two input terminals to make the output zero when both inputs are grounded. It arises from mismatch of the input transistors (VBE). For the 741, Vio ≈ 1 mV typical, 6 mV maximum. #### Input offset current **Input offset current (Ios)** is the difference between the bias currents flowing into the two inputs when the output is zero: Ios = |IB1 − IB2|. For the 741, Ios ≈ 20 nA typical, 200 nA maximum. (Input bias current IB = (IB1 + IB2)/2.) #### Compensating the effect of input bias currents The input transistors need base currents IB1 and IB2. These flow through the external resistors and produce an output voltage even with zero input. ```text Rf +----/\/\/----+ | | Vi --R1--+--> IB1 -(-) | >--+---- Vo +-----> IB2 ---(+) | Rcomp | GND ``` Take Vi = 0 (only bias currents act). IB1 flows into the inverting input and IB2 into the non-inverting input. **Without compensation (Rcomp = 0):** the non-inverting input is at 0 V, so the inverting input is also at 0 V (virtual ground). No current flows in R1, so all of IB1 comes through Rf: ```text Vo = IB1 · Rf ``` e.g. IB = 500 nA, Rf = 1 MΩ gives 0.5 V of output error with no input. **With compensation resistor Rcomp at the non-inverting input:** ```text V+ = -IB2·Rcomp = V- KCL at inverting node: (0 - V-)/R1 + (Vo - V-)/Rf = IB1 Vo = IB1·Rf + V-(1 + Rf/R1) = IB1·Rf - IB2·Rcomp(1 + Rf/R1) Choose Rcomp(1 + Rf/R1) = Rf, i.e. Rcomp = R1·Rf/(R1 + Rf) = R1 ‖ Rf Then Vo = Rf (IB1 - IB2) = Rf · Ios ``` Since Ios is only a fraction of IB (for the 741, 20 nA against 80 nA typical), the error falls a lot. The rule is: **both inputs should see the same dc resistance to ground.** **Other ways to reduce the effect of bias currents:** - Use op-amps with low IB (FET-input or super-β types, e.g. LF351, CA3140 with IB in pA). - Keep Rf (and all resistors) low, since the error is IB·Rf or Ios·Rf. - Use a T-network feedback to get high gain with smaller resistors. - Use the offset-null terminals (pins 1 and 5 on the 741 with a 10 kΩ pot) or an external balancing network to trim the remaining output offset to zero. - For ac amplifiers, use capacitor coupling so the dc gain is 1. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is the input offset voltage Vio? A. The dc voltage that must be applied between the inputs to make the output zero B. The voltage at the output when both inputs are at 1 V C. The difference between the two supply voltages D. The ac voltage that makes the gain unity Answer: A. Mismatch of the input transistors makes the output non-zero with both inputs grounded; Vio nulls it. (Key point: Input offset voltage) 2. How is the input offset current defined? A. Ios = (IB1 + IB2)/2 B. Ios = |IB1 - IB2|, the difference of the two input bias currents C. Ios = IB1 x IB2 D. Ios = IB1 + IB2 Answer: B. The average is the bias current IB; the difference is the offset current Ios. (Key point: Input offset current) 3. With Vi = 0 and Rcomp = 0 in an inverting amplifier, what is the output error due to IB1? A. Vo = IB1 x R1 B. Vo = 0, because the inverting input is a virtual ground C. Vo = IB1 x Rf D. Vo = IB1 x (R1 + Rf) Answer: C. The inverting input is at virtual ground so no current flows in R1; all of IB1 comes through Rf. (Key point: Bias current error without compensation) 4. What value of Rcomp at the non-inverting input minimises the bias-current error? A. Rcomp = R1 + Rf B. Rcomp = Rf C. Rcomp = 0 D. Rcomp = R1 || Rf Answer: D. Both inputs should see the same dc resistance to ground; then Vo = Rf(IB1 - IB2) = Rf x Ios, which is small. (Key point: Compensating resistor) ## Related in Advanced Electronics - [Offset/bias definitions; closed-loop input resistance](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aoffset-bias-closed-loop-input-resistance) — Advanced Electronics, chapter 2, asked 2× - [Output offset voltage of 741 inverting amplifier](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aoutput-offset-741-inverting) — Advanced Electronics, chapter 2 - [Bias and offset currents: effects and reduction](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Abias-offset-currents-effects) — Advanced Electronics, chapter 2 - [Effect of input bias currents and mitigation](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Abias-current-effect-mitigation) — Advanced Electronics, chapter 2 - [Effect of input offset voltage; PSRR](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aoffset-voltage-effect-psrr) — Advanced Electronics, chapter 2 - [Positive/negative bias current effect and reduction](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Apositive-negative-bias-current) — Advanced Electronics, chapter 2 ## Related in other subjects - [Design CE amplifier with divider bias (20 V, 10 mA)](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Ace-design-divider-20v-10ma) — Electronics Devices and Circuit, chapter 2 - [Design divider-bias CE amplifier (24 V, 2 mA, beta 90)](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Ace-design-24v-2ma-beta90) — Electronics Devices and Circuit, chapter 2 - [Design CE voltage divider bias, beta 200](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Ace-divider-bias-design-beta200) — Electronics Devices and Circuit, chapter 2 - [CE amplifier input resistance and overall gain](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Ace-input-resistance-gain-680k) — Electronics Devices and Circuit, chapter 2