--- title: "SCR two-transistor model and V-I curve" subject: "Advanced Electronics" chapter: 7 key: "semester_4/advanced_electronics:scr-two-transistor-vi" source: https://www.bctengineer.com/q/semester_4/advanced_electronics/scr-two-transistor-vi site: BCT Engineering --- # SCR two-transistor model and V-I curve Advanced Electronics · Chapter 7: Introduction to Power Electronics - Asked in: 2073 Shrawan, 7 marks; 2073 Chaitra, 7 marks; 2072 Kartik, 3+3 marks; 2069 Asar, 7 marks; 2069 Chaitra, 4+3 marks (asked 5 times) - Video: [two transistor analogy of scr (hindi)](https://www.youtube.com/watch?v=R2WwlCJ6ZUM) — Eduphile - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/scr-two-transistor-vi - Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-7 ## Question Explain the working principle of Silicon Controlled Rectifier (SCR, thyristor) utilizing two transistor models along with its VI characteristic curve (for differing gate current values). ## Short answer An SCR is a four-layer PNPN device modeled as inter-connected PNP and NPN transistors with positive feedback. When α1+α2 approaches 1, the device latches ON; gate current lowers forward breakover voltage. It stays ON until anode current falls below holding current IH; the V-I characteristic shows forward blocking, breakover, and low-voltage on-state. ## Answer A **Silicon Controlled Rectifier (SCR)** is a four-layer PNPN, three-terminal (anode A, cathode K, gate G) unidirectional switch. It stays OFF in the forward direction until a gate pulse (or breakover voltage) turns it ON, and then it stays ON (latches) until the anode current falls below the holding current. #### Structure and two-transistor model The PNPN structure is split into a PNP transistor Q1 (P1-N1-P2) and an NPN transistor Q2 (N1-P2-N2) sharing the middle layers. ```text A A | | [P1] Q1 (PNP) emitter at A [N1] ---+ | \ [P2] | split ==> | +--- B1 = C2 [N2] | | / | | C1 = B2 --+--- G K Q2 (NPN) | K (Q2 emitter) ``` Collector of Q1 drives the base of Q2, and collector of Q2 drives the base of Q1, forming a **positive feedback (regenerative) loop**. #### Mathematical expression For each transistor, IC = α·IE + ICBO. ```text IC1 = α1·IA + ICBO1 IC2 = α2·IK + ICBO2 IK = IA + IG IA = IC1 + IC2 (KCL at the N1-P2 region) IA = α1·IA + ICBO1 + α2(IA + IG) + ICBO2 IA = (α2·IG + ICBO1 + ICBO2) / (1 − (α1 + α2)) ``` #### Working - **Forward blocking:** with small IG, α1 and α2 are small, α1 + α2 << 1, and IA is a tiny leakage current. J2 is reverse biased and blocks the voltage. - **Turn-on:** a gate current increases IK and so α2. As current grows, α1 and α2 rise. When **α1 + α2 → 1**, the denominator approaches zero and IA rises sharply, limited only by the external load. Both transistors saturate and the device latches ON. - After turn-on, the gate loses control; the SCR stays ON as long as IA > holding current IH. - **Reverse blocking:** with cathode positive, J1 and J3 are reverse biased; only a small leakage flows until reverse breakdown. #### V-I characteristic ```text IA ^ IG2>IG1>IG0=0 | | on-state | | IL -|..../ | IH -|.../ | | \ \ \ | \ \ \ forward -VBR | IG2 IG1 IG0 blocking ----+-----+--------------------> VAK | | VBO2 VBO1 VBO0 |reverse |blocking ``` - **Reverse blocking region:** small leakage until reverse breakdown VBR. - **Forward blocking region:** small leakage until forward breakover voltage VBO. - **Forward conduction region:** after breakover, voltage drops to about 1–2 V and current is set by the load. - **Effect of gate current:** larger IG lowers the breakover voltage (IG2 > IG1 > IG0 gives VBO2 < VBO1 < VBO0). With large enough IG, the SCR behaves almost like a diode. - **Latching current IL:** minimum anode current needed just after triggering to keep it ON. **Holding current IH** (< IL): minimum current to stay ON. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How is the SCR split in the two-transistor model? A. Two NPN transistors connected in series B. A PNP transistor (P1-N1-P2) and an NPN transistor (N1-P2-N2) sharing the middle layers C. Two PNP transistors connected in parallel D. A PNP and an NPN transistor with no shared layers Answer: B. The four PNPN layers are divided into PNP Q1 and NPN Q2 that share the N1 and P2 layers. (Key point: Two-transistor model) 2. What makes the SCR latch ON after a gate pulse? A. The gate keeps supplying current continuously B. The reverse bias on J2 increases C. Each transistor's collector drives the other's base, giving positive feedback D. Negative feedback between the two transistors Answer: C. The collector of Q1 feeds the base of Q2 and vice versa, so the loop is regenerative. (Key point: Regenerative loop) 3. In IA = (α2·IG + ICBO1 + ICBO2)/(1 − (α1 + α2)), when does IA rise sharply? A. When α1 + α2 approaches 0 B. When IG becomes zero C. When α1 equals α2 exactly D. When α1 + α2 approaches 1 Answer: D. The denominator tends to zero as α1 + α2 → 1, so IA is limited only by the external load. (Key point: Turn-on condition) 4. What does a larger gate current do to the forward breakover voltage? A. It lowers VBO B. It raises VBO C. It leaves VBO unchanged but raises IH D. It removes the reverse blocking region Answer: A. IG2 > IG1 > IG0 gives VBO2 < VBO1 < VBO0; with large IG the SCR acts almost like a diode. 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