---
title: "Sigma-delta applications; 8-bit dual slope numerical"
subject: "Advanced Electronics"
chapter: 3
key: "semester_4/advanced_electronics:sigma-delta-dual-slope-numerical"
source: https://www.bctengineer.com/q/semester_4/advanced_electronics/sigma-delta-dual-slope-numerical
site: BCT Engineering
---

# Sigma-delta applications; 8-bit dual slope numerical

Advanced Electronics · Chapter 3: Digital-to-Analog and Analog-to-Digital Conversion

- Asked in: 2070 Asar, 2+5 marks
- Video: [Dual Slope ADC: Basics, Structure, Working, Output, and Conversion Time](https://www.youtube.com/watch?v=wkQPFUHrrWA) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/sigma-delta-dual-slope-numerical
- Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-3

## Question

State the application of sigma delta ADC. In an 8-bit Dual Slope ADC, R = 20 KΩ and C = 0.001 μF. An analog input signal of -0.25V is integrated for t1 = 160 μs. What is the maximum voltage reached in the integration? If the counter is clocked at 3.125 MHz what is the digital output after the conversion?

## Short answer

Sigma-delta ADC is used in digital audio, precision measurement, and data acquisition. For the dual-slope ADC, the integrator reaches Vmax = 2 V after 160 µs. With Vref = 1 V, the digital output is 125 (01111101 in 8-bit).

## Answer

#### Applications of sigma-delta ADC
A sigma-delta (ΣΔ) ADC uses oversampling, noise shaping and digital filtering. It gives very high resolution (16 to 24 bits) at low to medium speed. It is used in:
- Digital audio: CD and studio recording, codecs, mobile phones
- Precision measurement: weighing scales, strain gauges, thermocouples
- Digital voltmeters and data acquisition
- Voice-band telecommunication, modems and seismic sensors

#### Dual slope ADC numerical
**Given:** n = 8, R = 20 kΩ, C = 0.001 µF, Vin = −0.25 V, t1 = 160 µs, clock = 3.125 MHz.

**1. Integrator time constant**
```text
RC = 20×10³ × 0.001×10⁻⁶ = 20×10⁻⁶ s = 20 µs
```

**2. Maximum voltage reached during integration**
The inverting integrator output after t1 is:

```text
Vo(max) = −(1/RC) ∫₀^t1 Vin dt = −Vin·t1/RC
        = −(−0.25)(160 µs)/(20 µs)
        = +2 V
```

So the integrator output reaches **2 V**.

**3. Digital output**
The reference voltage is not given, so assume Vref = 1 V (opposite in polarity to Vin). During de-integration the output falls from 2 V to 0 at slope Vref/RC:

```text
t2 = Vo(max) · RC / Vref = 2 × 20 µs / 1 = 40 µs
Clock period Tclk = 1/3.125 MHz = 0.32 µs
N = t2 / Tclk = 40 / 0.32 = 125
```

In binary (8 bits): 125 = **01111101**.

Check with the dual slope relation: t2 = t1·|Vin|/Vref = 160 × 0.25/1 = 40 µs, which matches.

**Answer:** Vmax = **2 V**. Digital output = **125 = 01111101₂** (taking Vref = 1 V). For any other Vref (in volts), N = 125/Vref.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. A sigma-delta ADC is suited to:
   A. Very high speed video
   B. Smallest hardware at 4 bits
   C. High-resolution, low to medium speed uses such as digital audio and weighing scales
   D. Flash-type conversion
   Answer: C. It uses oversampling, noise shaping and digital filtering for 16 to 24 bits. (Key point: ΣΔ use)

2. RC with R = 20 kΩ and C = 0.001 µF is:
   A. 2 µs
   B. 200 µs
   C. 20 ms
   D. 20 µs
   Answer: D. 20x10^3 x 10^-9 = 20 µs. (Key point: Time constant)

3. Peak integrator voltage = Vin t1/RC =
   A. 2 V
   B. 0.5 V
   C. 8 V
   D. 0.25 V
   Answer: A. 0.25 x 160/20 = 2 V. (Key point: Peak voltage)

4. With Vref = 1 V and 3.125 MHz clock, the count is:
   A. 40
   B. 125
   C. 160
   D. 250
   Answer: B. t2 = 40 µs; clock period 0.32 µs; N = 125 = 01111101. (Key point: Digital output)

## Related in Advanced Electronics

- [Dual slope ADC numerical (12 kHz clock)](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-numerical-12khz) — Advanced Electronics, chapter 3
- [Counter-type ADC numerical (VFS = 12 V)](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Acounter-adc-12v-numerical) — Advanced Electronics, chapter 3
- [Dual slope ADC working; why accurate](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-adc-accurate) — Advanced Electronics, chapter 3, asked 3×
- [Dual slope ADC block diagram; integral linearity](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-integral-linearity) — Advanced Electronics, chapter 3
- [Dual slope ADC: RC independence, noise immunity](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-rc-noise-immune) — Advanced Electronics, chapter 3
- [Dual slope ADC; why quad slope is more accurate](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-quad-slope) — Advanced Electronics, chapter 3

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