---
title: "3 op-amp IA output and common-mode rejection"
subject: "Advanced Electronics"
chapter: 4
key: "semester_4/advanced_electronics:three-opamp-ia-cm-rejection"
source: https://www.bctengineer.com/q/semester_4/advanced_electronics/three-opamp-ia-cm-rejection
site: BCT Engineering
---

# 3 op-amp IA output and common-mode rejection

Advanced Electronics · Chapter 4: Instrumentation and Isolation Amplifiers

- Asked in: 2068 Chaitra, 5+2 marks
- Video: [Instrumentation Amplifier with 3 OpAmps, How does it work? What are the Gain and Transfer function?](https://www.youtube.com/watch?v=Yq767et8BbY) — Engineering Prof.
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/three-opamp-ia-cm-rejection
- Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-4

## Question

Find the expression for output voltage of three op-amp instrumentation amplifier. Also, explain how it rejects common mode signal.

## Short answer

Output voltage: Vo = (R3/R2)*(1+2R1/RG)*(V2-V1). Common-mode rejection: With V1=V2=Vcm, voltage across RG is zero so no current in R1, thus Vo1=Vo2=Vcm; the first stage passes common-mode with gain 1 while differential gain is boosted, and the difference amplifier cancels the common-mode, yielding zero output.

## Answer

The three op-amp instrumentation amplifier has two buffer op-amps (A1, A2) forming an input gain stage, followed by a difference amplifier (A3).

#### Circuit
```text
 V1 --->(+)\
           A1>---+--Vo1--[R2]--+--[R3]--+
       +->(-)/   |             |        |
       |         R1          (-)\       |
       +---------+              A3>-----+--> Vo
       RG                    (+)/
       +---------+             |
       +->(-)\   R1   Vo2--[R2]+--[R3]--GND
       |   A2>---+--Vo2
 V2 --->(+)/
```

#### Expression for output voltage
**Input stage.** By the virtual short, the two ends of RG are at V1 and V2. The current through RG is:

```text
I = (V1 − V2)/RG
```

No current enters the op-amp inputs, so the same I flows through both R1 resistors:

```text
Vo1 = V1 + I·R1 = V1 + (R1/RG)(V1 − V2)
Vo2 = V2 − I·R1 = V2 − (R1/RG)(V1 − V2)

Vo2 − Vo1 = (V2 − V1)(1 + 2R1/RG)
```

**Difference stage (A3).** By superposition:

```text
V+ = Vo2 · R3/(R2 + R3)
Vo = (1 + R3/R2)·V+ − (R3/R2)·Vo1
   = (R3/R2)(Vo2 − Vo1)
```

**Result:**
```text
Vo = (R3/R2)(1 + 2R1/RG)(V2 − V1)
```

#### How it rejects common-mode signal
Let V1 = V2 = Vcm (pure common-mode input):
1. The voltage across RG is zero, so I = 0 and no current flows in R1.
2. So Vo1 = Vcm and Vo2 = Vcm. The first stage passes the common-mode signal with **gain 1 only**, while the differential signal gets a gain of (1 + 2R1/RG).
3. A3 with matched resistors subtracts its two inputs: Vo = (R3/R2)(Vcm − Vcm) = 0.

Rejection happens in two steps. The first stage raises the differential signal relative to the common-mode one by (1 + 2R1/RG), which multiplies the CMRR by this factor. The difference amplifier then cancels what remains. Any residual mismatch in the R2/R3 network is trimmed with a potentiometer in one R3 to maximise CMRR.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. For V1 = V2 = Vcm, what is the current in RG?
   A. Vcm/RG
   B. Zero
   C. 2 Vcm/RG
   D. Infinite
   Answer: B. There is no voltage across RG. (Key point: Common-mode current)

2. What is the first stage's gain for common-mode signals?
   A. 1 + 2R1/RG
   B. Zero
   C. 1
   D. R3/R2
   Answer: C. Vo1 = Vo2 = Vcm, so gain is 1. (Key point: First stage CM gain)

3. How does A3 finish the rejection?
   A. It subtracts Vo1 from Vo2 so equal common-mode values cancel
   B. It amplifies Vcm
   C. It adds the two outputs
   D. It grounds both
   Answer: A. Vo = (R3/R2)(Vcm - Vcm) = 0 with matched resistors. (Key point: Role of A3)

4. By what factor does the first stage multiply CMRR?
   A. R3/R2
   B. 1 + 2R1/RG
   C. 2R1
   D. 1/RG
   Answer: B. Differential gain rises by this factor while common-mode gain stays 1. (Key point: CMRR multiplication)

## Related in Advanced Electronics

- [IA features; 3 op-amp IA output voltage](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Aia-features-3opamp-output) — Advanced Electronics, chapter 4
- [Output voltage of two op-amp IA](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Atwo-opamp-ia-output) — Advanced Electronics, chapter 4
- [Design three op-amp IA with gain 20](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adesign-3opamp-ia-gain-20) — Advanced Electronics, chapter 4, asked 3×
- [Design three op-amp IA with gain 50](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adesign-3opamp-ia-gain-50) — Advanced Electronics, chapter 4, asked 3×
- [3 op-amp IA advantages; electromagnetic isolation](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Athree-opamp-ia-electromagnetic-isolation) — Advanced Electronics, chapter 4
- [Single op-amp IA with mismatched resistances](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Asingle-opamp-ia-mismatched) — Advanced Electronics, chapter 4

## Related in other subjects

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- [Summing amplifier using op-amp](https://www.bctengineer.com/question.md?key=semester_1%2Ffundamental_of_electrical_and_electronics_engineering%3Asumming-amplifier-op-amp) — Fundamental of Electrical and Electronics Engineering, chapter 6
- [Voltage gain of non-inverting op-amp](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Aopamp-noninverting-gain) — Basic Electronics Engineering, chapter 4, asked 2×
- [Non-inverting op-amp voltage gain](https://www.bctengineer.com/question.md?key=semester_1%2Ffundamental_of_electrical_and_electronics_engineering%3Anon-inverting-amplifier-gain) — Fundamental of Electrical and Electronics Engineering, chapter 6
