--- title: "Current mirror conditions and Widlar output resistance" subject: "Advanced Electronics" chapter: 1 key: "semester_4/advanced_electronics:widlar-essential-conditions-output-resistance" source: https://www.bctengineer.com/q/semester_4/advanced_electronics/widlar-essential-conditions-output-resistance site: BCT Engineering --- # Current mirror conditions and Widlar output resistance Advanced Electronics · Chapter 1: Operational Amplifier Circuits - Asked in: 2073 Shrawan, 2+5 marks; 2070 Chaitra, 2+5 marks; 2068 Chaitra, 2+5 marks (asked 3 times) - Video: [Lec-51 Wildar Current Source- Basics, Derivation, Output R, Advantages | A E | R K Classes | Hindi |](https://www.youtube.com/watch?v=DY7bkW4VsfQ) — R K Classes - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/advanced_electronics/widlar-essential-conditions-output-resistance - Whole chapter: https://www.bctengineer.com/md/semester_4/advanced_electronics/chapter-1 ## Question What are the essential conditions for a current mirror to work? Derive an expression for an output resistance of Widlar Current Source. ## Short answer Matched transistors, same temperature, equal VBE, Q2 in active region, and high β. A small‑signal test at the collector yields Ro = ro + (RE‖rπ)(1+gmro) ≈ ro(1+gmRE) for RE< VCE(sat), i.e. the load must leave enough voltage across Q2. - **High β:** so that the base currents taken from the reference branch are negligible. #### Output resistance of the Widlar current source The Widlar current source is a simple mirror with a resistor RE in the emitter of the output transistor Q2. It gives a small output current (µA range) from a normal reference current. ```text +VCC IO (from load) | | R | | IREF | +------+ | | | | C1 | C2 Q1 B----+-------------B Q2 E1 E2 | | | RE | | GND GND ``` DC relation (neglecting base currents): ```text VBE1 = VBE2 + IO·RE VT ln(IREF/IS) = VT ln(IO/IS) + IO·RE IO·RE = VT ln(IREF/IO) ``` Small-signal model: Q1 is diode-connected, so its resistance is only about 1/gm1 and the base of Q2 is close to ac ground. Apply a test voltage *vx* at the collector of Q2 and let *ix* flow into it. ```text Emitter node: ix flows into RE ‖ rπ (rπ goes to the grounded base), so ve = ix (RE ‖ rπ) = ix R'E Base is grounded: vbe = 0 - ve = -ix R'E Current into collector: ix = gm vbe + (vx - ve)/ro = -gm ix R'E + (vx - ix R'E)/ro Multiply by ro and collect terms: vx = ix ro + ix R'E (1 + gm ro) Ro = vx/ix = ro + R'E (1 + gm ro) Since gm ro >> 1: Ro ≈ ro (1 + gm R'E), R'E = RE ‖ rπ ``` If RE << rπ, then **Ro ≈ ro(1 + gm RE)**, where gm = IO/VT and ro = VA/IO. A simple mirror has Ro = ro only, so the Widlar source has an output resistance larger by the factor (1 + gm RE). Since gm·RE = IO·RE/VT = ln(IREF/IO), this factor is typically about 4 to 6 (for example, 5.6 when IREF/IO = 100). This is the result of the current-series negative feedback provided by the unbypassed RE: any rise in IO raises the drop across RE, lowers VBE2 and pulls IO back down. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Why must Q1 and Q2 of a current mirror be matched and at the same temperature? A. So that Q2 operates in saturation B. So that equal VBE gives equal collector currents C. So that β becomes infinite D. So that the load resistance becomes zero Answer: B. Equal IS, β and temperature make VBE1 = VBE2 produce IC2 = IC1. (Key point: Mirror requirement) 2. Which condition must the output transistor Q2 satisfy for the mirror to work? A. IC2 = 0 B. VCE2 > VCE(sat) so it stays in the active region C. VCE2 < VCE(sat) D. VBE2 = 0 Answer: B. If Q2 saturates it no longer behaves as a current source, so the load must leave VCE2 above VCE(sat). (Key point: Active region) 3. What is the output resistance of the Widlar current source (RE << rπ)? A. gm RE B. ro/(1 + gm RE) C. ro D. ro(1 + gm RE) Answer: D. The unbypassed RE gives current-series feedback, raising Ro from ro to about ro(1 + gm RE). (Key point: Widlar output resistance) 4. In the small-signal analysis, why does RE raise the output resistance? A. RE increases β of Q2 B. RE makes Q1 and Q2 have different VBE C. A rise in IO raises the drop across RE, lowers VBE2 and pulls IO back down D. RE increases the Early voltage of Q2 Answer: C. Negative (current-series) feedback from RE opposes any change in IO caused by a change in output voltage. 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