--- title: "Features and addressing modes of 8085" subject: "Microprocessor" chapter: 2 key: "semester_4/microprocessor:8085-features-addressing-modes" source: https://www.bctengineer.com/q/semester_4/microprocessor/8085-features-addressing-modes site: BCT Engineering --- # Features and addressing modes of 8085 Microprocessor · Chapter 2: Programming with 8085 Microprocessor - Asked in: 2070 Magh, 3+5 marks - Video: [8085 Addressing Modes |Engineering & Technology 4 U |](https://www.youtube.com/watch?v=uLw0rxzdao0) — Ulhaskumar Gokhale - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/microprocessor/8085-features-addressing-modes - Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-2 ## Question Write any three features of 8085 microprocessor. Explain the addressing modes of 8085 with example. ## Short answer Features: 8-bit data bus, 16-bit address bus for 64 KB memory; single +5 V supply with on-chip clock, 3 MHz; five interrupts plus SID/SOD and 256 I/O ports. Addressing modes are immediate, register, direct, register indirect, and implied, with examples MVI A,45H; MOV A,B; LDA 2050H; MOV A,M; CMA. ## Answer #### Features of 8085 1. 8-bit microprocessor with 8-bit data bus and 16-bit address bus (addresses 64 KB memory). 2. Single +5 V supply and on-chip clock generator; operates at 3 MHz (internal clock = crystal frequency / 2). 3. Has 5 hardware interrupts (TRAP, RST7.5, RST6.5, RST5.5, INTR), serial I/O lines (SID, SOD), and addresses 256 input and 256 output ports. (Others: multiplexed address/data bus AD0-AD7, 74 instructions, 40-pin DIP, HOLD/HLDA DMA support.) #### Addressing modes The way in which the operand of an instruction is specified. 1. **Immediate**: data is in the instruction itself. `MVI A,45H` (A <- 45H), `LXI SP,2FFFH`. 2. **Register**: the operand is in a register. `MOV A,B` (A <- B), `ADD C`. 3. **Direct**: the instruction has the 16-bit memory address (or 8-bit port address) of the operand. `LDA 2050H` (A <- M[2050H]), `STA 3000H`, `IN 80H`. 4. **Register indirect**: a register pair holds the memory address. `MOV A,M` (address in HL), `LDAX B` (address in BC), `STAX D`. 5. **Implied**: the opcode itself says which register holds the operand, so no operand is written. `CMA` (complement A), `RAL`, `DAA`, `STC`. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Why can the 8085 address 64 KB of memory? A. Because it has an 8-bit data bus B. Because it has a 16-bit address bus (2^16 = 65,536 locations) C. Because it runs at 3 MHz D. Because it has 256 input and 256 output ports Answer: B. A 16-bit address bus gives 2^16 = 64 K unique addresses; the 8-bit data bus only sets the word size. (Key point: 8-bit data bus, 16-bit address bus gives 64 KB memory) 2. In MVI A,45H, which addressing mode is used and why? A. Direct, because 45H is a memory address B. Register, because the destination is A C. Immediate, because the data 45H is part of the instruction itself D. Implied, because no memory address is written Answer: C. In immediate addressing the operand (45H) is given inside the instruction, so A simply receives 45H. (Key point: Immediate mode: the data is in the instruction itself) 3. What does LDA 2050H do, and what addressing mode is it? A. Loads A with the content of memory location 2050H; direct addressing B. Loads A with the number 2050H; immediate addressing C. Loads A from the address held in HL; register indirect addressing D. Loads HL with 2050H; immediate addressing Answer: A. In direct addressing the instruction contains the 16-bit address of the operand, so A gets M[2050H]. (Key point: Direct mode: instruction carries the operand's address (LDA 2050H)) 4. Which of these instructions uses register indirect addressing? A. MOV A,B B. STA 3000H C. CMA D. LDAX B Answer: D. LDAX B loads A from the memory location whose address is in the BC pair, which is register indirect addressing; MOV A,B is register, STA is direct, CMA is implied. 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