--- title: "Internal architecture of 8086" subject: "Microprocessor" chapter: 3 key: "semester_4/microprocessor:8086-architecture-block-diagram" source: https://www.bctengineer.com/q/semester_4/microprocessor/8086-architecture-block-diagram site: BCT Engineering --- # Internal architecture of 8086 Microprocessor · Chapter 3: Programming with 8086 Microprocessor - Asked in: 2073 Bhadra, 8 marks; 2070 Bhadra, 5 marks; 2070 Magh, 8 marks; 2069 Bhadra, 4 marks (asked 4 times) - Video: [Architecture of 8086 Microprocessor: Detailed Block Diagram and Data Flow Model 8086](https://www.youtube.com/watch?v=Uuxa90Xl4Rs) — Engineering Funda - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/microprocessor/8086-architecture-block-diagram - Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-3 ## Question Draw the internal architecture (block diagram) of 8086 microprocessor and explain each block. ## Short answer The 8086 internally splits into a Bus Interface Unit (BIU) with segment registers, instruction pointer, 6-byte prefetch queue, and bus logic; and an Execution Unit (EU) with general registers AX–DX, pointer/index registers, ALU, and flag register. BIU and EU operate in parallel via pipelining. ## Answer ```text +---------------- BIU ----------------+ | CS DS SS ES (segment regs) | | IP (instruction pointer) | | Address adder -> 20-bit address | | 6-byte instruction queue | | Bus control logic | +------------------+------------------+ | internal bus +------------------+------------------+ | AX BX CX DX (general registers) | | SP BP SI DI (pointer/index) | | ALU FLAG register | | Control unit + instruction decoder | +---------------- EU -----------------+ BIU <-> external bus: AD0-AD15, A16-A19, control ``` The 8086 is a 16-bit microprocessor with a 16-bit data bus and a 20-bit address bus (1 MB of memory). Internally it is divided into two independent units, the **Bus Interface Unit (BIU)** and the **Execution Unit (EU)**, which work in parallel (pipelining). #### Bus Interface Unit (BIU) Handles all external bus operations: fetching instructions, reading and writing memory and I/O. - **Segment registers** CS, DS, SS, ES: hold the base of the code, data, stack and extra segments. - **Instruction pointer (IP)**: offset of the next instruction in the code segment. - **Address adder**: physical address = (segment × 10H) + offset, giving 20 bits. - **Instruction queue**: 6-byte FIFO. The BIU pre-fetches instructions while the EU executes, so the EU rarely waits. - **Bus control logic**: generates address, data and control signals; the AD0–AD15 lines are multiplexed. #### Execution Unit (EU) Decodes and executes instructions; it has no direct connection to the outside world. - **General purpose registers** AX, BX, CX, DX (each splits into 8-bit halves, e.g. AH/AL). - **Pointer and index registers** SP, BP, SI, DI. - **ALU**: 16-bit arithmetic and logic operations. - **Flag register**: 9 flags (CF, PF, AF, ZF, SF, OF, TF, IF, DF). - **Control unit and decoder**: takes opcodes from the queue, decodes them and generates control signals for the ALU and registers. When the EU needs data from memory or I/O, it asks the BIU to transfer it. Whenever at least 2 bytes of the queue are free, the BIU fetches the next instruction bytes. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How is the 8086 divided internally? A. ALU and control unit B. BIU and EU working in parallel C. Memory and I/O units D. Input and output units Answer: B. The BIU and EU operate concurrently (pipelining). (Key point: Two units) 2. How does the BIU form the 20-bit address? A. segment + offset B. segment x 10H + offset C. segment x 100H + offset D. offset x 10H Answer: B. The address adder computes segment x 10H + offset, giving 20 bits (1 MB). (Key point: Physical address) 3. What is the 6-byte queue for? A. Storing results B. Pre-fetching instructions while the EU executes, so the EU rarely waits C. Holding flags D. Storing stack data Answer: B. The BIU pre-fetches into the FIFO queue. (Key point: Instruction queue) 4. How does the EU access memory? A. Directly through the address bus B. By asking the BIU C. Through the instruction queue D. It cannot access memory Answer: B. The EU has no direct external connection; it requests the BIU. (Key point: EU connection) ## Related in Microprocessor - [8086 architecture and programmer registers](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-architecture-registers) — Microprocessor, chapter 3 - [Internal architecture of 8085](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-architecture) — Microprocessor, chapter 2, asked 3× - [Microprocessor based system and bus organization](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Amp-based-system-bus-organization) — Microprocessor, chapter 1, asked 5× - [8086 assembly language operators](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-operators) — Microprocessor, chapter 3, asked 3× - [Interrupt processing in 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterrupt-processing-8086) — Microprocessor, chapter 5, asked 3× - [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2× ## Related in other subjects - [MBI block diagram and basic features](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ambi-block-features) — Instrumentation II, chapter 1, asked 4× - [DMA controller block diagram and transfer](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adma-controller) — Computer Organization and Architecture, chapter 7, asked 6× - [MBI block diagram, advantages and DMA](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ambi-block-advantages-dma) — Instrumentation II, chapter 1 - [MBI block diagram and advantages in industry](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ambi-block-advantages) — Instrumentation II, chapter 1