---
title: "Bus Interface Unit of 8086"
subject: "Microprocessor"
chapter: 3
key: "semester_4/microprocessor:8086-bus-interface-unit"
source: https://www.bctengineer.com/q/semester_4/microprocessor/8086-bus-interface-unit
site: BCT Engineering
---

# Bus Interface Unit of 8086

Microprocessor · Chapter 3: Programming with 8086 Microprocessor

- Asked in: 2070 Bhadra, 3 marks
- Video: [What is Bus Interface Unit (BIU) in 8086 Microprocessor || Ekeeda.com](https://www.youtube.com/watch?v=jI9tgBCpdaI) — Ekeeda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/microprocessor/8086-bus-interface-unit
- Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-3

## Question

Explain Bus Interface Unit of 8086 microprocessor.

## Short answer

The Bus Interface Unit (BIU) fetches instructions from memory into a 6-byte prefetch queue, generates 20-bit physical addresses by adding segment×16 plus offset, handles memory/I/O data transfers, and controls the multiplexed bus signals. It keeps the queue filled so the Execution Unit can execute without waiting, flushing and refetching on branches.

## Answer

The **Bus Interface Unit (BIU)** is the part of the 8086 that connects the processor to the outside world (memory, I/O) through the system bus. It performs all bus operations on behalf of the Execution Unit (EU).

**Functions**
- Fetches instruction bytes from memory and places them in the 6-byte instruction queue (pre-fetching) while the EU is busy.
- Generates the 20-bit physical address by the address adder: segment register × 10H + offset.
- Reads operands from memory or I/O and writes results back when the EU requests.
- Generates the control signals (RD, WR, ALE, DEN, DT/R, M/IO) and controls the multiplexed address/data bus.
- Flushes the queue and refetches when a jump, call or interrupt changes the program flow.

**Main components**
1. Segment registers CS, DS, SS and ES.
2. Instruction pointer (IP).
3. Address adder (summing circuit).
4. 6-byte instruction queue (FIFO).
5. Bus control logic.

The BIU starts a fetch whenever two bytes of the queue are empty, so the EU usually finds the next instruction ready.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the main role of the BIU?
   A. Execute arithmetic
   B. Connect the processor to memory and I/O and perform all bus operations for the EU
   C. Decode opcodes
   D. Hold flags
   Answer: B. The BIU performs all external bus operations. (Key point: BIU role)

2. How does the BIU generate the physical address?
   A. segment x 10H + offset
   B. segment + offset
   C. offset x 10H
   D. segment x 100H
   Answer: A. The address adder gives 20 bits. (Key point: Address generation)

3. When does the BIU start a fetch?
   A. When two bytes of the queue are empty
   B. When the queue is full
   C. Only on interrupt
   D. Only after a jump
   Answer: A. It keeps the queue filled so the EU finds the next instruction ready. (Key point: Fetch trigger)

## Related in Microprocessor

- [Microprocessor based system and bus organization](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Amp-based-system-bus-organization) — Microprocessor, chapter 1, asked 5×
- [BIU and EU of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-biu-vs-eu) — Microprocessor, chapter 3
- [Internal architecture of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-architecture-block-diagram) — Microprocessor, chapter 3, asked 4×
- [8086 assembly language operators](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-operators) — Microprocessor, chapter 3, asked 3×
- [Interrupt processing in 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterrupt-processing-8086) — Microprocessor, chapter 5, asked 3×
- [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2×

## Related in other subjects

- [How interrupts interface with microprocessor](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Ainterrupt-interface-microprocessor) — Embedded System, chapter 5
- [Input/output interface unit design factors](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aio-interface-unit-importance) — Instrumentation II, chapter 7
- [I/O bus and interface modules](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aio-bus-interface-modules) — Computer Organization and Architecture, chapter 7
- [PCI bus; 8255 printer interface at 5500H](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Apci-printer-5500h) — Instrumentation II, chapter 2