--- title: "Bus, bus types and RTL for MOV" subject: "Microprocessor" chapter: 1 key: "semester_4/microprocessor:bus-types-rtl-mov" source: https://www.bctengineer.com/q/semester_4/microprocessor/bus-types-rtl-mov site: BCT Engineering --- # Bus, bus types and RTL for MOV Microprocessor · Chapter 1: Introduction to Microprocessor - Asked in: 2070 Bhadra, 4+4 marks - Video: [L-1.4:Types of Buses (Address, Data and Control) in Computer Organization and Architecture](https://www.youtube.com/watch?v=xBYhHC8_A6o) — Gate Smashers - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/microprocessor/bus-types-rtl-mov - Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-1 ## Question Define bus. Explain different types of bus. Define RTL. Write down the RTL for MOV r1, r2 in 8085 microprocessor. ## Short answer A bus is a group of parallel conductors. The unidirectional address bus selects a memory/IO location; the bidirectional data bus carries data/instructions; the control bus handles read/write and timing signals. RTL uses symbolic notation: MOV r1,r2 fetches the opcode (IR←M[PC], PC+1) and then performs r1←r2 in the same machine cycle. ## Answer #### Bus A **bus** is a group of parallel conductors (wires) used to carry binary information (address, data or control signals) between the microprocessor, memory and I/O devices. #### Types of bus 1. **Address bus**: unidirectional (CPU to others). It carries the address of the memory location or I/O port. With *n* lines, 2ⁿ locations can be addressed. The 8085 has a 16-bit address bus (A0-A15), so it can address 64 KB. 2. **Data bus**: bidirectional. It carries data and instruction codes between the CPU and memory/I/O. Width decides the word size; the 8085 has an 8-bit data bus (D0-D7, multiplexed with A0-A7 as AD0-AD7). 3. **Control bus**: carries signals that coordinate operations. Examples are RD, WR, IO/M, ALE, READY, HOLD, HLDA, INTR, INTA. Some are outputs from the CPU, some are inputs to it. #### RTL **Register Transfer Language (RTL)** is a symbolic notation that describes the micro-operations of a processor as data transfers between registers or between registers and memory, e.g., `A <- B`, `MDR <- M[MAR]`. #### RTL for MOV r1, r2 `MOV r1,r2` copies the contents of register r2 into r1. It is a 1-byte instruction (01 DDD SSS) and takes one machine cycle (opcode fetch) of 4 T-states in the 8085. ```text M1 (opcode fetch, 4 T-states): T1-T3: IR <- M[PC] ; PC <- PC + 1 ; read the opcode 01DDDSSS T4: decode IR, then r1 <- r2 ; no further memory access ``` Example: `MOV A,B` has opcode 78H; after execution A has the value of B and B is unchanged. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Which description is correct for the data bus? A. Unidirectional, carries addresses B. Bidirectional, carries data and instruction codes C. Unidirectional, carries control signals only D. Bidirectional, carries only addresses Answer: B. The data bus is two-way between CPU and memory/I/O. (Key point: Data bus direction) 2. What follows from the 8085's 16-bit address bus? A. It can address 16 locations B. It can address 64 KB C. It can address 1 MB D. It can address 256 bytes Answer: B. 2^16 = 65,536 locations = 64 KB. (Key point: 8085 address bus) 3. What is RTL? A. A high-level programming language B. A symbolic notation describing micro-operations as register transfers C. A hardware bus protocol D. A type of memory Answer: B. RTL describes processor micro-operations as transfers between registers or registers and memory. (Key point: RTL definition) 4. What is true of MOV r1,r2 in the 8085? A. It has 3 machine cycles B. It takes one machine cycle (opcode fetch) of 4 T-states and copies r2 into r1 C. It copies r1 into r2 D. It needs a memory operand read Answer: B. It is a 1-byte instruction: fetch opcode 01DDDSSS, then r1<-r2 with no further memory access; r2 is unchanged. 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