---
title: "DAA, SPHL, XTHL, PCHL instructions"
subject: "Microprocessor"
chapter: 2
key: "semester_4/microprocessor:daa-sphl-xthl-pchl"
source: https://www.bctengineer.com/q/semester_4/microprocessor/daa-sphl-xthl-pchl
site: BCT Engineering
---

# DAA, SPHL, XTHL, PCHL instructions

Microprocessor · Chapter 2: Programming with 8085 Microprocessor

- Asked in: 2073 Bhadra, 4 marks
- Video: [8085 Instructions | PCHL, SPHL, XTHL and XCHG| Microprocessor for GATE](https://www.youtube.com/watch?v=5R_lYvFN_MI) — eLearnTech
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/microprocessor/daa-sphl-xthl-pchl
- Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-2

## Question

Explain the following instructions with example program: (i) DAA (ii) SPHL (iii) XTHL (iv) PCHL

## Short answer

DAA adjusts accumulator after BCD addition by conditionally adding 06H/60H if nibbles >9 or carry. SPHL copies HL to SP. XTHL exchanges HL with top of stack without changing SP. PCHL loads PC with HL for computed jumps.

## Answer

#### (i) DAA: Decimal Adjust Accumulator
After adding two packed BCD numbers with a binary ADD, `DAA` converts the result in A to a valid BCD result. It adds 06H if the low nibble is greater than 9 or AC = 1, and then adds 60H if the high nibble is greater than 9 or CY = 1. All flags are affected. (1 byte, 4T)

```asm
        MVI A,38H       ; BCD 38
        ADI 45H         ; BCD 45 -> A = 7DH (binary sum)
        DAA             ; low nibble D > 9, add 06H -> A = 83H (BCD 83)
        HLT
```

#### (ii) SPHL
Copies the content of the HL pair into the stack pointer: SP <- HL. No flags are affected. (1 byte, 6T)

```asm
        LXI H,27FFH     ; HL = 27FFH
        SPHL            ; SP = 27FFH (stack initialised)
```

#### (iii) XTHL
Exchanges HL with the top of the stack: L <-> M[SP], H <-> M[SP+1]. SP does not change. No flags are affected. (1 byte, 16T)

```asm
        LXI SP,3000H
        LXI H,1234H     ; H = 12H, L = 34H
        XTHL            ; if M[3000H]=78H, M[3001H]=56H:
                        ; then HL = 5678H, M[3000H]=34H, M[3001H]=12H
```

#### (iv) PCHL
Loads PC with the contents of HL: PC <- HL, so the next instruction is fetched from the address in HL (a computed jump). No flags are affected. (1 byte, 6T)

```asm
        LXI H,3000H     ; HL = 3000H
        PCHL            ; PC = 3000H, execution continues at 3000H
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. After MVI A,38H and ADI 45H, A = 7DH. What does DAA do next?
   A. Adds 60H because the high nibble is greater than 9, giving DDH
   B. Adds 06H because the low nibble D is greater than 9, giving 83H (BCD 83)
   C. Subtracts 06H, giving 77H
   D. Nothing, because 7DH is already a valid BCD number
   Answer: B. The low nibble D is greater than 9, so DAA adds 06H: 7DH + 06H = 83H, which is the correct BCD sum of 38 + 45. (Key point: DAA adds 06H if low nibble > 9 or AC = 1 (then 60H for high nibble/CY))

2. What is the effect of LXI H,27FFH followed by SPHL?
   A. SP = 27FFH
   B. HL is pushed onto the stack at 27FFH
   C. PC = 27FFH and execution jumps there
   D. HL and SP exchange their contents
   Answer: A. SPHL copies HL into the stack pointer, so SP becomes 27FFH; it is commonly used to initialise the stack. No flags change. (Key point: SPHL copies HL into SP (SP <- HL))

3. SP = 3000H, HL = 1234H, M[3000H] = 78H, M[3001H] = 56H. What is the result of XTHL?
   A. HL = 7856H, SP = 3002H
   B. HL = 5678H, SP = 2FFEH
   C. HL = 5678H, M[3000H] = 34H, M[3001H] = 12H, SP stays 3000H
   D. HL = 3000H, SP = 1234H
   Answer: C. XTHL exchanges L with M[SP] and H with M[SP+1] without changing SP, so HL = 5678H and the stack top now holds 34H, 12H. (Key point: XTHL swaps L with M[SP] and H with M[SP+1]; SP unchanged)

4. What does PCHL do?
   A. Pushes PC onto the stack and loads HL into PC, like a CALL
   B. Copies PC into HL
   C. Exchanges PC and HL
   D. Loads PC with the content of HL, so execution continues at the address in HL
   Answer: D. PCHL sets PC <- HL, so the next instruction is fetched from the address in HL; no return address is saved and no flags change. (Key point: PCHL loads PC from HL, giving a computed jump)

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